blob: 711e4a8948e06edcb420f08183525cb7f60d54b4 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
27#include <linux/version.h>
28#include <linux/module.h>
29#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080030#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070031#include <linux/etherdevice.h>
32#include <linux/ethtool.h>
33#include <linux/pci.h>
34#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030035#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070036#include <linux/tcp.h>
37#include <linux/in.h>
38#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080039#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070040#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080041#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070042#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080043#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070044
45#include <asm/irq.h>
46
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070047#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
48#define SKY2_VLAN_TAG_USED 1
49#endif
50
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070051#include "sky2.h"
52
53#define DRV_NAME "sky2"
Stephen Hemminger743d32a2008-06-17 09:04:28 -070054#define DRV_VERSION "1.22"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070055#define PFX DRV_NAME " "
56
57/*
58 * The Yukon II chipset takes 64 bit command blocks (called list elements)
59 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070060 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070061 */
62
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070064#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070065#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080066#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070067
Stephen Hemminger793b8832005-09-14 16:06:14 -070068#define TX_RING_SIZE 512
69#define TX_DEF_PENDING (TX_RING_SIZE - 1)
70#define TX_MIN_PENDING 64
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080071#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemminger793b8832005-09-14 16:06:14 -070072
73#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070074#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070075#define TX_WATCHDOG (5 * HZ)
76#define NAPI_WEIGHT 64
77#define PHY_RETRIES 1000
78
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070079#define SKY2_EEPROM_MAGIC 0x9955aabb
80
81
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070082#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
83
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070084static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070085 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
86 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080087 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070088
Stephen Hemminger793b8832005-09-14 16:06:14 -070089static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070090module_param(debug, int, 0);
91MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92
Stephen Hemminger14d02632006-09-26 11:57:43 -070093static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080094module_param(copybreak, int, 0);
95MODULE_PARM_DESC(copybreak, "Receive copy threshold");
96
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080097static int disable_msi = 0;
98module_param(disable_msi, int, 0);
99MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
100
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -0700101static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800102 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700140 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700141 { 0 }
142};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700143
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700144MODULE_DEVICE_TABLE(pci, sky2_id_table);
145
146/* Avoid conditionals by using array */
147static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
148static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700149static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700150
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100151static void sky2_set_multicast(struct net_device *dev);
152
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800153/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800154static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700155{
156 int i;
157
158 gma_write16(hw, port, GM_SMI_DATA, val);
159 gma_write16(hw, port, GM_SMI_CTRL,
160 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
161
162 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800163 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
164 if (ctrl == 0xffff)
165 goto io_error;
166
167 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800168 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800169
170 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700171 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800172
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800173 dev_warn(&hw->pdev->dev,"%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800174 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800175
176io_error:
177 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
178 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700179}
180
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800181static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700182{
183 int i;
184
Stephen Hemminger793b8832005-09-14 16:06:14 -0700185 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700186 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
187
188 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800189 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
190 if (ctrl == 0xffff)
191 goto io_error;
192
193 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800194 *val = gma_read16(hw, port, GM_SMI_DATA);
195 return 0;
196 }
197
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800198 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700199 }
200
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800201 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800202 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800203io_error:
204 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
205 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800206}
207
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800208static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800209{
210 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800211 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800212 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700213}
214
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800215
216static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700217{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800218 /* switch power to VCC (WA for VAUX problem) */
219 sky2_write8(hw, B0_POWER_CTRL,
220 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700221
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800222 /* disable Core Clock Division, */
223 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700224
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800225 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
226 /* enable bits are inverted */
227 sky2_write8(hw, B2_Y2_CLK_GATE,
228 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
229 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
230 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
231 else
232 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700233
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700234 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700235 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700236
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800237 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700238
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800239 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700240 /* set all bits to 0 except bits 15..12 and 8 */
241 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800242 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700243
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800244 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700245 /* set all bits to 0 except bits 28 & 27 */
246 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800247 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700248
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800249 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700250
251 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
252 reg = sky2_read32(hw, B2_GP_IO);
253 reg |= GLB_GPIO_STAT_RACE_DIS;
254 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700255
256 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700257 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800258}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700259
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800260static void sky2_power_aux(struct sky2_hw *hw)
261{
262 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
263 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
264 else
265 /* enable bits are inverted */
266 sky2_write8(hw, B2_Y2_CLK_GATE,
267 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
268 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
269 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
270
271 /* switch power to VAUX */
272 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
273 sky2_write8(hw, B0_POWER_CTRL,
274 (PC_VAUX_ENA | PC_VCC_ENA |
275 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700276}
277
Stephen Hemmingera068c0a2008-05-14 17:04:17 -0700278static void sky2_power_state(struct sky2_hw *hw, pci_power_t state)
279{
280 u16 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
281 int pex = pci_find_capability(hw->pdev, PCI_CAP_ID_EXP);
282 u32 reg;
283
284 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
285
286 switch (state) {
287 case PCI_D0:
288 break;
289
290 case PCI_D1:
291 power_control |= 1;
292 break;
293
294 case PCI_D2:
295 power_control |= 2;
296 break;
297
298 case PCI_D3hot:
299 case PCI_D3cold:
300 power_control |= 3;
301 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
302 /* additional power saving measurements */
303 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
304
305 /* set gating core clock for LTSSM in L1 state */
306 reg |= P_PEX_LTSSM_STAT(P_PEX_LTSSM_L1_STAT) |
307 /* auto clock gated scheme controlled by CLKREQ */
308 P_ASPM_A1_MODE_SELECT |
309 /* enable Gate Root Core Clock */
310 P_CLK_GATE_ROOT_COR_ENA;
311
312 if (pex && (hw->flags & SKY2_HW_CLK_POWER)) {
313 /* enable Clock Power Management (CLKREQ) */
314 u16 ctrl = sky2_pci_read16(hw, pex + PCI_EXP_DEVCTL);
315
316 ctrl |= PCI_EXP_DEVCTL_AUX_PME;
317 sky2_pci_write16(hw, pex + PCI_EXP_DEVCTL, ctrl);
318 } else
319 /* force CLKREQ Enable in Our4 (A1b only) */
320 reg |= P_ASPM_FORCE_CLKREQ_ENA;
321
322 /* set Mask Register for Release/Gate Clock */
323 sky2_pci_write32(hw, PCI_DEV_REG5,
324 P_REL_PCIE_EXIT_L1_ST | P_GAT_PCIE_ENTER_L1_ST |
325 P_REL_PCIE_RX_EX_IDLE | P_GAT_PCIE_RX_EL_IDLE |
326 P_REL_GPHY_LINK_UP | P_GAT_GPHY_LINK_DOWN);
327 } else
328 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_CLK_HALT);
329
330 /* put CPU into reset state */
331 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, HCU_CCSR_ASF_RESET);
332 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev == CHIP_REV_YU_SU_A0)
333 /* put CPU into halt state */
334 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, HCU_CCSR_ASF_HALTED);
335
336 if (pex && !(hw->flags & SKY2_HW_RAM_BUFFER)) {
337 reg = sky2_pci_read32(hw, PCI_DEV_REG1);
338 /* force to PCIe L1 */
339 reg |= PCI_FORCE_PEX_L1;
340 sky2_pci_write32(hw, PCI_DEV_REG1, reg);
341 }
342 break;
343
344 default:
345 dev_warn(&hw->pdev->dev, PFX "Invalid power state (%d) ",
346 state);
347 return;
348 }
349
350 power_control |= PCI_PM_CTRL_PME_ENABLE;
351 /* Finally, set the new power state. */
352 sky2_pci_write32(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
353
354 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
355 sky2_pci_read32(hw, B0_CTST);
356}
357
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700358static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700359{
360 u16 reg;
361
362 /* disable all GMAC IRQ's */
363 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700364
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700365 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
366 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
367 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
368 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
369
370 reg = gma_read16(hw, port, GM_RX_CTRL);
371 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
372 gma_write16(hw, port, GM_RX_CTRL, reg);
373}
374
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700375/* flow control to advertise bits */
376static const u16 copper_fc_adv[] = {
377 [FC_NONE] = 0,
378 [FC_TX] = PHY_M_AN_ASP,
379 [FC_RX] = PHY_M_AN_PC,
380 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
381};
382
383/* flow control to advertise bits when using 1000BaseX */
384static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700385 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700386 [FC_TX] = PHY_M_P_ASYM_MD_X,
387 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700388 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700389};
390
391/* flow control to GMA disable bits */
392static const u16 gm_fc_disable[] = {
393 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
394 [FC_TX] = GM_GPCR_FC_RX_DIS,
395 [FC_RX] = GM_GPCR_FC_TX_DIS,
396 [FC_BOTH] = 0,
397};
398
399
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700400static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
401{
402 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700403 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700404
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700405 if (sky2->autoneg == AUTONEG_ENABLE &&
406 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700407 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
408
409 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700410 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700411 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
412
Stephen Hemminger53419c62007-05-14 12:38:11 -0700413 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700414 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700415 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700416 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
417 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700418 /* set master & slave downshift counter to 1x */
419 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700420
421 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
422 }
423
424 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700425 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700426 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700427 /* enable automatic crossover */
428 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700429
430 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
431 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
432 u16 spec;
433
434 /* Enable Class A driver for FE+ A0 */
435 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
436 spec |= PHY_M_FESC_SEL_CL_A;
437 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
438 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700439 } else {
440 /* disable energy detect */
441 ctrl &= ~PHY_M_PC_EN_DET_MSK;
442
443 /* enable automatic crossover */
444 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
445
Stephen Hemminger53419c62007-05-14 12:38:11 -0700446 /* downshift on PHY 88E1112 and 88E1149 is changed */
Stephen Hemminger93745492007-02-06 10:45:43 -0800447 if (sky2->autoneg == AUTONEG_ENABLE
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700448 && (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700449 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700450 ctrl &= ~PHY_M_PC_DSC_MSK;
451 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
452 }
453 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700454 } else {
455 /* workaround for deviation #4.88 (CRC errors) */
456 /* disable Automatic Crossover */
457
458 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700459 }
460
461 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
462
463 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700464 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700465 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
466
467 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
468 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
469 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
470 ctrl &= ~PHY_M_MAC_MD_MSK;
471 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700472 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
473
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700474 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700475 /* select page 1 to access Fiber registers */
476 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700477
478 /* for SFP-module set SIGDET polarity to low */
479 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
480 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700481 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700482 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700483
484 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700485 }
486
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700487 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700488 ct1000 = 0;
489 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700490 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700491
492 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700493 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700494 if (sky2->advertising & ADVERTISED_1000baseT_Full)
495 ct1000 |= PHY_M_1000C_AFD;
496 if (sky2->advertising & ADVERTISED_1000baseT_Half)
497 ct1000 |= PHY_M_1000C_AHD;
498 if (sky2->advertising & ADVERTISED_100baseT_Full)
499 adv |= PHY_M_AN_100_FD;
500 if (sky2->advertising & ADVERTISED_100baseT_Half)
501 adv |= PHY_M_AN_100_HD;
502 if (sky2->advertising & ADVERTISED_10baseT_Full)
503 adv |= PHY_M_AN_10_FD;
504 if (sky2->advertising & ADVERTISED_10baseT_Half)
505 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700506
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700507 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700508 } else { /* special defines for FIBER (88E1040S only) */
509 if (sky2->advertising & ADVERTISED_1000baseT_Full)
510 adv |= PHY_M_AN_1000X_AFD;
511 if (sky2->advertising & ADVERTISED_1000baseT_Half)
512 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700513
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700514 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700515 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700516
517 /* Restart Auto-negotiation */
518 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
519 } else {
520 /* forced speed/duplex settings */
521 ct1000 = PHY_M_1000C_MSE;
522
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700523 /* Disable auto update for duplex flow control and speed */
524 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700525
526 switch (sky2->speed) {
527 case SPEED_1000:
528 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700529 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700530 break;
531 case SPEED_100:
532 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700533 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700534 break;
535 }
536
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700537 if (sky2->duplex == DUPLEX_FULL) {
538 reg |= GM_GPCR_DUP_FULL;
539 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700540 } else if (sky2->speed < SPEED_1000)
541 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700542
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700543
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700544 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700545
546 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700547 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700548 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
549 else
550 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700551 }
552
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700553 gma_write16(hw, port, GM_GP_CTRL, reg);
554
Stephen Hemminger05745c42007-09-19 15:36:45 -0700555 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700556 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
557
558 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
559 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
560
561 /* Setup Phy LED's */
562 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
563 ledover = 0;
564
565 switch (hw->chip_id) {
566 case CHIP_ID_YUKON_FE:
567 /* on 88E3082 these bits are at 11..9 (shifted left) */
568 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
569
570 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
571
572 /* delete ACT LED control bits */
573 ctrl &= ~PHY_M_FELP_LED1_MSK;
574 /* change ACT LED control to blink mode */
575 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
576 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
577 break;
578
Stephen Hemminger05745c42007-09-19 15:36:45 -0700579 case CHIP_ID_YUKON_FE_P:
580 /* Enable Link Partner Next Page */
581 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
582 ctrl |= PHY_M_PC_ENA_LIP_NP;
583
584 /* disable Energy Detect and enable scrambler */
585 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
586 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
587
588 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
589 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
590 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
591 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
592
593 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
594 break;
595
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700596 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700597 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700598
599 /* select page 3 to access LED control register */
600 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
601
602 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700603 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
604 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
605 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
606 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
607 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700608
609 /* set Polarity Control register */
610 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700611 (PHY_M_POLC_LS1_P_MIX(4) |
612 PHY_M_POLC_IS0_P_MIX(4) |
613 PHY_M_POLC_LOS_CTRL(2) |
614 PHY_M_POLC_INIT_CTRL(2) |
615 PHY_M_POLC_STA1_CTRL(2) |
616 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700617
618 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700619 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700620 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800621
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700622 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800623 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800624 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700625 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
626
627 /* select page 3 to access LED control register */
628 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
629
630 /* set LED Function Control register */
631 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
632 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
633 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
634 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
635 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
636
637 /* set Blink Rate in LED Timer Control Register */
638 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
639 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
640 /* restore page register */
641 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
642 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700643
644 default:
645 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
646 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800647
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700648 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800649 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700650 }
651
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700652 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800653 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700654 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
655
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800656 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700657 gm_phy_write(hw, port, 0x18, 0xaa99);
658 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700659
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700660 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
661 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
662 gm_phy_write(hw, port, 0x18, 0xa204);
663 gm_phy_write(hw, port, 0x17, 0x2002);
664 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800665
666 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700667 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700668 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
669 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
670 /* apply workaround for integrated resistors calibration */
671 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
672 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700673 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
674 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700675 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800676 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
677
678 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
679 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800680 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800681 }
682
683 if (ledover)
684 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
685
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700686 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700687
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700688 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700689 if (sky2->autoneg == AUTONEG_ENABLE)
690 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
691 else
692 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
693}
694
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700695static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
696static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
697
698static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700699{
700 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700701
Stephen Hemminger82637e82008-01-23 19:16:04 -0800702 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800703 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700704 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700705
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700706 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
Stephen Hemmingerff35164e2007-10-11 19:47:44 -0700707 reg1 |= coma_mode[port];
708
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800709 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800710 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
711 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700712}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700713
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700714static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
715{
716 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700717 u16 ctrl;
718
719 /* release GPHY Control reset */
720 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
721
722 /* release GMAC reset */
723 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
724
725 if (hw->flags & SKY2_HW_NEWER_PHY) {
726 /* select page 2 to access MAC control register */
727 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
728
729 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
730 /* allow GMII Power Down */
731 ctrl &= ~PHY_M_MAC_GMIF_PUP;
732 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
733
734 /* set page register back to 0 */
735 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
736 }
737
738 /* setup General Purpose Control Register */
739 gma_write16(hw, port, GM_GP_CTRL,
740 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
741
742 if (hw->chip_id != CHIP_ID_YUKON_EC) {
743 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
744 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
745
746 /* enable Power Down */
747 ctrl |= PHY_M_PC_POW_D_ENA;
748 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
749 }
750
751 /* set IEEE compatible Power Down Mode (dev. #4.99) */
752 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
753 }
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700754
755 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
756 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700757 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700758 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
759 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700760}
761
Stephen Hemminger1b537562005-12-20 15:08:07 -0800762/* Force a renegotiation */
763static void sky2_phy_reinit(struct sky2_port *sky2)
764{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800765 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800766 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800767 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800768}
769
Stephen Hemmingere3173832007-02-06 10:45:39 -0800770/* Put device in state to listen for Wake On Lan */
771static void sky2_wol_init(struct sky2_port *sky2)
772{
773 struct sky2_hw *hw = sky2->hw;
774 unsigned port = sky2->port;
775 enum flow_control save_mode;
776 u16 ctrl;
777 u32 reg1;
778
779 /* Bring hardware out of reset */
780 sky2_write16(hw, B0_CTST, CS_RST_CLR);
781 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
782
783 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
784 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
785
786 /* Force to 10/100
787 * sky2_reset will re-enable on resume
788 */
789 save_mode = sky2->flow_mode;
790 ctrl = sky2->advertising;
791
792 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
793 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700794
795 spin_lock_bh(&sky2->phy_lock);
796 sky2_phy_power_up(hw, port);
797 sky2_phy_init(hw, port);
798 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800799
800 sky2->flow_mode = save_mode;
801 sky2->advertising = ctrl;
802
803 /* Set GMAC to no flow control and auto update for speed/duplex */
804 gma_write16(hw, port, GM_GP_CTRL,
805 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
806 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
807
808 /* Set WOL address */
809 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
810 sky2->netdev->dev_addr, ETH_ALEN);
811
812 /* Turn on appropriate WOL control bits */
813 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
814 ctrl = 0;
815 if (sky2->wol & WAKE_PHY)
816 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
817 else
818 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
819
820 if (sky2->wol & WAKE_MAGIC)
821 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
822 else
823 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
824
825 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
826 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
827
828 /* Turn on legacy PCI-Express PME mode */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800829 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800830 reg1 |= PCI_Y2_PME_LEGACY;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800831 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800832
833 /* block receiver */
834 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
835
836}
837
Stephen Hemminger69161612007-06-04 17:23:26 -0700838static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
839{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700840 struct net_device *dev = hw->dev[port];
841
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800842 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
843 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
844 hw->chip_id == CHIP_ID_YUKON_FE_P ||
845 hw->chip_id == CHIP_ID_YUKON_SUPR) {
846 /* Yukon-Extreme B0 and further Extreme devices */
847 /* enable Store & Forward mode for TX */
Stephen Hemminger69161612007-06-04 17:23:26 -0700848
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800849 if (dev->mtu <= ETH_DATA_LEN)
850 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
851 TX_JUMBO_DIS | TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700852
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800853 else
854 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
855 TX_JUMBO_ENA| TX_STFW_ENA);
856 } else {
857 if (dev->mtu <= ETH_DATA_LEN)
858 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
859 else {
860 /* set Tx GMAC FIFO Almost Empty Threshold */
861 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
862 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700863
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800864 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
865
866 /* Can't do offload because of lack of store/forward */
867 dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
868 }
Stephen Hemminger69161612007-06-04 17:23:26 -0700869 }
870}
871
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700872static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
873{
874 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
875 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100876 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700877 int i;
878 const u8 *addr = hw->dev[port]->dev_addr;
879
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700880 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
881 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700882
883 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
884
Stephen Hemminger793b8832005-09-14 16:06:14 -0700885 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700886 /* WA DEV_472 -- looks like crossed wires on port 2 */
887 /* clear GMAC 1 Control reset */
888 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
889 do {
890 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
891 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
892 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
893 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
894 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
895 }
896
Stephen Hemminger793b8832005-09-14 16:06:14 -0700897 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700898
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700899 /* Enable Transmit FIFO Underrun */
900 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
901
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800902 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700903 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700904 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800905 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700906
907 /* MIB clear */
908 reg = gma_read16(hw, port, GM_PHY_ADDR);
909 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
910
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700911 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
912 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700913 gma_write16(hw, port, GM_PHY_ADDR, reg);
914
915 /* transmit control */
916 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
917
918 /* receive control reg: unicast + multicast + no FCS */
919 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700920 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700921
922 /* transmit flow control */
923 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
924
925 /* transmit parameter */
926 gma_write16(hw, port, GM_TX_PARAM,
927 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
928 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
929 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
930 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
931
932 /* serial mode register */
933 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700934 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700935
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700936 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700937 reg |= GM_SMOD_JUMBO_ENA;
938
939 gma_write16(hw, port, GM_SERIAL_MODE, reg);
940
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700941 /* virtual address for data */
942 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
943
Stephen Hemminger793b8832005-09-14 16:06:14 -0700944 /* physical address: used for pause frames */
945 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
946
947 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700948 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
949 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
950 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
951
952 /* Configure Rx MAC FIFO */
953 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100954 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700955 if (hw->chip_id == CHIP_ID_YUKON_EX ||
956 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100957 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700958
Al Viro25cccec2007-07-20 16:07:33 +0100959 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700960
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800961 if (hw->chip_id == CHIP_ID_YUKON_XL) {
962 /* Hardware errata - clear flush mask */
963 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
964 } else {
965 /* Flush Rx MAC FIFO on any flow control or error */
966 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
967 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700968
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800969 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700970 reg = RX_GMF_FL_THR_DEF + 1;
971 /* Another magic mystery workaround from sk98lin */
972 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
973 hw->chip_rev == CHIP_REV_YU_FE2_A0)
974 reg = 0x178;
975 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700976
977 /* Configure Tx MAC FIFO */
978 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
979 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800980
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700981 /* On chips without ram buffer, pause is controled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800982 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800983 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800984 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700985
Stephen Hemminger69161612007-06-04 17:23:26 -0700986 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800987 }
988
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800989 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
990 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
991 /* disable dynamic watermark */
992 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
993 reg &= ~TX_DYN_WM_ENA;
994 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
995 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700996}
997
Stephen Hemminger67712902006-12-04 15:53:45 -0800998/* Assign Ram Buffer allocation to queue */
999static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001000{
Stephen Hemminger67712902006-12-04 15:53:45 -08001001 u32 end;
1002
1003 /* convert from K bytes to qwords used for hw register */
1004 start *= 1024/8;
1005 space *= 1024/8;
1006 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001007
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001008 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
1009 sky2_write32(hw, RB_ADDR(q, RB_START), start);
1010 sky2_write32(hw, RB_ADDR(q, RB_END), end);
1011 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
1012 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
1013
1014 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001015 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001016
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001017 /* On receive queue's set the thresholds
1018 * give receiver priority when > 3/4 full
1019 * send pause when down to 2K
1020 */
1021 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
1022 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001023
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001024 tp = space - 2048/8;
1025 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
1026 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001027 } else {
1028 /* Enable store & forward on Tx queue's because
1029 * Tx FIFO is only 1K on Yukon
1030 */
1031 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
1032 }
1033
1034 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001035 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001036}
1037
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001038/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001039static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001040{
1041 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1042 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1043 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001044 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001045}
1046
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001047/* Setup prefetch unit registers. This is the interface between
1048 * hardware and driver list elements
1049 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001050static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001051 u64 addr, u32 last)
1052{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001053 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1054 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
1055 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
1056 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
1057 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
1058 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001059
1060 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001061}
1062
Stephen Hemminger793b8832005-09-14 16:06:14 -07001063static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
1064{
1065 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
1066
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001067 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001068 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001069 return le;
1070}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001071
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001072static void tx_init(struct sky2_port *sky2)
1073{
1074 struct sky2_tx_le *le;
1075
1076 sky2->tx_prod = sky2->tx_cons = 0;
1077 sky2->tx_tcpsum = 0;
1078 sky2->tx_last_mss = 0;
1079
1080 le = get_tx_le(sky2);
1081 le->addr = 0;
1082 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001083}
1084
Stephen Hemminger291ea612006-09-26 11:57:41 -07001085static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
1086 struct sky2_tx_le *le)
1087{
1088 return sky2->tx_ring + (le - sky2->tx_le);
1089}
1090
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001091/* Update chip's next pointer */
1092static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001093{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001094 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001095 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001096 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1097
1098 /* Synchronize I/O on since next processor may write to tail */
1099 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001100}
1101
Stephen Hemminger793b8832005-09-14 16:06:14 -07001102
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001103static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1104{
1105 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001106 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001107 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001108 return le;
1109}
1110
Stephen Hemminger14d02632006-09-26 11:57:43 -07001111/* Build description to hardware for one receive segment */
1112static void sky2_rx_add(struct sky2_port *sky2, u8 op,
1113 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001114{
1115 struct sky2_rx_le *le;
1116
Stephen Hemminger86c68872008-01-10 16:14:12 -08001117 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001118 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001119 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001120 le->opcode = OP_ADDR64 | HW_OWNER;
1121 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001122
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001123 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -08001124 le->addr = cpu_to_le32((u32) map);
1125 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001126 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001127}
1128
Stephen Hemminger14d02632006-09-26 11:57:43 -07001129/* Build description to hardware for one possibly fragmented skb */
1130static void sky2_rx_submit(struct sky2_port *sky2,
1131 const struct rx_ring_info *re)
1132{
1133 int i;
1134
1135 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1136
1137 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1138 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1139}
1140
1141
1142static void sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
1143 unsigned size)
1144{
1145 struct sk_buff *skb = re->skb;
1146 int i;
1147
1148 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
1149 pci_unmap_len_set(re, data_size, size);
1150
1151 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1152 re->frag_addr[i] = pci_map_page(pdev,
1153 skb_shinfo(skb)->frags[i].page,
1154 skb_shinfo(skb)->frags[i].page_offset,
1155 skb_shinfo(skb)->frags[i].size,
1156 PCI_DMA_FROMDEVICE);
1157}
1158
1159static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1160{
1161 struct sk_buff *skb = re->skb;
1162 int i;
1163
1164 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1165 PCI_DMA_FROMDEVICE);
1166
1167 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1168 pci_unmap_page(pdev, re->frag_addr[i],
1169 skb_shinfo(skb)->frags[i].size,
1170 PCI_DMA_FROMDEVICE);
1171}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001172
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001173/* Tell chip where to start receive checksum.
1174 * Actually has two checksums, but set both same to avoid possible byte
1175 * order problems.
1176 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001177static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001178{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001179 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001180
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001181 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1182 le->ctrl = 0;
1183 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001184
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001185 sky2_write32(sky2->hw,
1186 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1187 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001188}
1189
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001190/*
1191 * The RX Stop command will not work for Yukon-2 if the BMU does not
1192 * reach the end of packet and since we can't make sure that we have
1193 * incoming data, we must reset the BMU while it is not doing a DMA
1194 * transfer. Since it is possible that the RX path is still active,
1195 * the RX RAM buffer will be stopped first, so any possible incoming
1196 * data will not trigger a DMA. After the RAM buffer is stopped, the
1197 * BMU is polled until any DMA in progress is ended and only then it
1198 * will be reset.
1199 */
1200static void sky2_rx_stop(struct sky2_port *sky2)
1201{
1202 struct sky2_hw *hw = sky2->hw;
1203 unsigned rxq = rxqaddr[sky2->port];
1204 int i;
1205
1206 /* disable the RAM Buffer receive queue */
1207 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1208
1209 for (i = 0; i < 0xffff; i++)
1210 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1211 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1212 goto stopped;
1213
1214 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
1215 sky2->netdev->name);
1216stopped:
1217 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1218
1219 /* reset the Rx prefetch unit */
1220 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001221 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001222}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001223
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001224/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001225static void sky2_rx_clean(struct sky2_port *sky2)
1226{
1227 unsigned i;
1228
1229 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001230 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001231 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001232
1233 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001234 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001235 kfree_skb(re->skb);
1236 re->skb = NULL;
1237 }
1238 }
1239}
1240
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001241/* Basic MII support */
1242static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1243{
1244 struct mii_ioctl_data *data = if_mii(ifr);
1245 struct sky2_port *sky2 = netdev_priv(dev);
1246 struct sky2_hw *hw = sky2->hw;
1247 int err = -EOPNOTSUPP;
1248
1249 if (!netif_running(dev))
1250 return -ENODEV; /* Phy still in reset */
1251
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001252 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001253 case SIOCGMIIPHY:
1254 data->phy_id = PHY_ADDR_MARV;
1255
1256 /* fallthru */
1257 case SIOCGMIIREG: {
1258 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001259
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001260 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001261 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001262 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001263
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001264 data->val_out = val;
1265 break;
1266 }
1267
1268 case SIOCSMIIREG:
1269 if (!capable(CAP_NET_ADMIN))
1270 return -EPERM;
1271
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001272 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001273 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1274 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001275 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001276 break;
1277 }
1278 return err;
1279}
1280
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001281#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001282static void sky2_set_vlan_mode(struct sky2_hw *hw, u16 port, bool onoff)
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001283{
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001284 if (onoff) {
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001285 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1286 RX_VLAN_STRIP_ON);
1287 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1288 TX_VLAN_TAG_ON);
1289 } else {
1290 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1291 RX_VLAN_STRIP_OFF);
1292 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1293 TX_VLAN_TAG_OFF);
1294 }
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001295}
1296
1297static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1298{
1299 struct sky2_port *sky2 = netdev_priv(dev);
1300 struct sky2_hw *hw = sky2->hw;
1301 u16 port = sky2->port;
1302
1303 netif_tx_lock_bh(dev);
1304 napi_disable(&hw->napi);
1305
1306 sky2->vlgrp = grp;
1307 sky2_set_vlan_mode(hw, port, grp != NULL);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001308
David S. Millerd1d08d12008-01-07 20:53:33 -08001309 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001310 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001311 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001312}
1313#endif
1314
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001315/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001316 * Allocate an skb for receiving. If the MTU is large enough
1317 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001318 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001319static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001320{
1321 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001322 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001323
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001324 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001325 unsigned char *start;
1326 /*
1327 * Workaround for a bug in FIFO that cause hang
1328 * if the FIFO if the receive buffer is not 64 byte aligned.
1329 * The buffer returned from netdev_alloc_skb is
1330 * aligned except if slab debugging is enabled.
1331 */
1332 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + 8);
1333 if (!skb)
1334 goto nomem;
1335 start = PTR_ALIGN(skb->data, 8);
1336 skb_reserve(skb, start - skb->data);
1337 } else {
1338 skb = netdev_alloc_skb(sky2->netdev,
1339 sky2->rx_data_size + NET_IP_ALIGN);
1340 if (!skb)
1341 goto nomem;
1342 skb_reserve(skb, NET_IP_ALIGN);
1343 }
Stephen Hemminger14d02632006-09-26 11:57:43 -07001344
1345 for (i = 0; i < sky2->rx_nfrags; i++) {
1346 struct page *page = alloc_page(GFP_ATOMIC);
1347
1348 if (!page)
1349 goto free_partial;
1350 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001351 }
1352
1353 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001354free_partial:
1355 kfree_skb(skb);
1356nomem:
1357 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001358}
1359
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001360static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1361{
1362 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1363}
1364
Stephen Hemminger82788c72006-01-17 13:43:10 -08001365/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001366 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001367 * Normal case this ends up creating one list element for skb
1368 * in the receive ring. Worst case if using large MTU and each
1369 * allocation falls on a different 64 bit region, that results
1370 * in 6 list elements per ring entry.
1371 * One element is used for checksum enable/disable, and one
1372 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001373 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001374static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001375{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001376 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001377 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001378 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001379 unsigned i, size, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001380
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001381 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001382 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001383
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001384 /* On PCI express lowering the watermark gives better performance */
1385 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1386 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1387
1388 /* These chips have no ram buffer?
1389 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001390 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001391 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1392 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001393 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001394
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001395 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1396
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001397 if (!(hw->flags & SKY2_HW_NEW_LE))
1398 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001399
Stephen Hemminger14d02632006-09-26 11:57:43 -07001400 /* Space needed for frame data + headers rounded up */
Stephen Hemmingerf957da22007-07-09 15:33:41 -07001401 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001402
1403 /* Stopping point for hardware truncation */
1404 thresh = (size - 8) / sizeof(u32);
1405
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001406 sky2->rx_nfrags = size >> PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001407 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1408
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001409 /* Compute residue after pages */
1410 size -= sky2->rx_nfrags << PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001411
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001412 /* Optimize to handle small packets and headers */
1413 if (size < copybreak)
1414 size = copybreak;
1415 if (size < ETH_HLEN)
1416 size = ETH_HLEN;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001417
Stephen Hemminger14d02632006-09-26 11:57:43 -07001418 sky2->rx_data_size = size;
1419
1420 /* Fill Rx ring */
1421 for (i = 0; i < sky2->rx_pending; i++) {
1422 re = sky2->rx_ring + i;
1423
1424 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001425 if (!re->skb)
1426 goto nomem;
1427
Stephen Hemminger14d02632006-09-26 11:57:43 -07001428 sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size);
1429 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001430 }
1431
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001432 /*
1433 * The receiver hangs if it receives frames larger than the
1434 * packet buffer. As a workaround, truncate oversize frames, but
1435 * the register is limited to 9 bits, so if you do frames > 2052
1436 * you better get the MTU right!
1437 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001438 if (thresh > 0x1ff)
1439 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1440 else {
1441 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1442 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1443 }
1444
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001445 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001446 sky2_rx_update(sky2, rxq);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001447 return 0;
1448nomem:
1449 sky2_rx_clean(sky2);
1450 return -ENOMEM;
1451}
1452
1453/* Bring up network interface. */
1454static int sky2_up(struct net_device *dev)
1455{
1456 struct sky2_port *sky2 = netdev_priv(dev);
1457 struct sky2_hw *hw = sky2->hw;
1458 unsigned port = sky2->port;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001459 u32 imask, ramsize;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001460 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001461 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001462
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001463 /*
1464 * On dual port PCI-X card, there is an problem where status
1465 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001466 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001467 if (otherdev && netif_running(otherdev) &&
1468 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001469 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001470
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001471 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001472 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001473 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
1474
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001475 }
1476
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001477 if (netif_msg_ifup(sky2))
1478 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1479
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001480 netif_carrier_off(dev);
1481
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001482 /* must be power of 2 */
1483 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001484 TX_RING_SIZE *
1485 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001486 &sky2->tx_le_map);
1487 if (!sky2->tx_le)
1488 goto err_out;
1489
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001490 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001491 GFP_KERNEL);
1492 if (!sky2->tx_ring)
1493 goto err_out;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001494
1495 tx_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001496
1497 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1498 &sky2->rx_le_map);
1499 if (!sky2->rx_le)
1500 goto err_out;
1501 memset(sky2->rx_le, 0, RX_LE_BYTES);
1502
Stephen Hemminger291ea612006-09-26 11:57:41 -07001503 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001504 GFP_KERNEL);
1505 if (!sky2->rx_ring)
1506 goto err_out;
1507
1508 sky2_mac_init(hw, port);
1509
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001510 /* Register is number of 4K blocks on internal RAM buffer. */
1511 ramsize = sky2_read8(hw, B2_E_0) * 4;
1512 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001513 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001514
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001515 hw->flags |= SKY2_HW_RAM_BUFFER;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001516 pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001517 if (ramsize < 16)
1518 rxspace = ramsize / 2;
1519 else
1520 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001521
Stephen Hemminger67712902006-12-04 15:53:45 -08001522 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1523 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1524
1525 /* Make sure SyncQ is disabled */
1526 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1527 RB_RST_SET);
1528 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001529
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001530 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001531
Stephen Hemminger69161612007-06-04 17:23:26 -07001532 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1533 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1534 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1535
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001536 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001537 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1538 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001539 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001540
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001541 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1542 TX_RING_SIZE - 1);
1543
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001544#ifdef SKY2_VLAN_TAG_USED
1545 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL);
1546#endif
1547
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001548 err = sky2_rx_start(sky2);
Stephen Hemminger6de16232007-10-17 13:26:42 -07001549 if (err)
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001550 goto err_out;
1551
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001552 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001553 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001554 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001555 sky2_write32(hw, B0_IMSK, imask);
1556
Stephen Hemmingera7bffe72008-01-23 19:11:51 -08001557 sky2_set_multicast(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001558 return 0;
1559
1560err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001561 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001562 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1563 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001564 sky2->rx_le = NULL;
1565 }
1566 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001567 pci_free_consistent(hw->pdev,
1568 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1569 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001570 sky2->tx_le = NULL;
1571 }
1572 kfree(sky2->tx_ring);
1573 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001574
Stephen Hemminger1b537562005-12-20 15:08:07 -08001575 sky2->tx_ring = NULL;
1576 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001577 return err;
1578}
1579
Stephen Hemminger793b8832005-09-14 16:06:14 -07001580/* Modular subtraction in ring */
1581static inline int tx_dist(unsigned tail, unsigned head)
1582{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001583 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001584}
1585
1586/* Number of list elements available for next tx */
1587static inline int tx_avail(const struct sky2_port *sky2)
1588{
1589 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1590}
1591
1592/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001593static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001594{
1595 unsigned count;
1596
1597 count = sizeof(dma_addr_t) / sizeof(u32);
1598 count += skb_shinfo(skb)->nr_frags * count;
1599
Herbert Xu89114af2006-07-08 13:34:32 -07001600 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001601 ++count;
1602
Patrick McHardy84fa7932006-08-29 16:44:56 -07001603 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001604 ++count;
1605
1606 return count;
1607}
1608
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001609/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001610 * Put one packet in ring for transmit.
1611 * A single packet can generate multiple list elements, and
1612 * the number of ring elements will probably be less than the number
1613 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001614 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001615static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1616{
1617 struct sky2_port *sky2 = netdev_priv(dev);
1618 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001619 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001620 struct tx_ring_info *re;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001621 unsigned i, len;
1622 dma_addr_t mapping;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001623 u16 mss;
1624 u8 ctrl;
1625
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001626 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1627 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001628
Stephen Hemminger793b8832005-09-14 16:06:14 -07001629 if (unlikely(netif_msg_tx_queued(sky2)))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001630 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1631 dev->name, sky2->tx_prod, skb->len);
1632
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001633 len = skb_headlen(skb);
1634 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001635
Stephen Hemminger86c68872008-01-10 16:14:12 -08001636 /* Send high bits if needed */
1637 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001638 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001639 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001640 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001641 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001642
1643 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001644 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001645 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001646
1647 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001648 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001649
Stephen Hemminger69161612007-06-04 17:23:26 -07001650 if (mss != sky2->tx_last_mss) {
1651 le = get_tx_le(sky2);
1652 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001653
1654 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001655 le->opcode = OP_MSS | HW_OWNER;
1656 else
1657 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001658 sky2->tx_last_mss = mss;
1659 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001660 }
1661
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001662 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001663#ifdef SKY2_VLAN_TAG_USED
1664 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1665 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1666 if (!le) {
1667 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001668 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001669 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001670 } else
1671 le->opcode |= OP_VLAN;
1672 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1673 ctrl |= INS_VLAN;
1674 }
1675#endif
1676
1677 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001678 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001679 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001680 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001681 ctrl |= CALSUM; /* auto checksum */
1682 else {
1683 const unsigned offset = skb_transport_offset(skb);
1684 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001685
Stephen Hemminger69161612007-06-04 17:23:26 -07001686 tcpsum = offset << 16; /* sum start */
1687 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001688
Stephen Hemminger69161612007-06-04 17:23:26 -07001689 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1690 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1691 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001692
Stephen Hemminger69161612007-06-04 17:23:26 -07001693 if (tcpsum != sky2->tx_tcpsum) {
1694 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001695
Stephen Hemminger69161612007-06-04 17:23:26 -07001696 le = get_tx_le(sky2);
1697 le->addr = cpu_to_le32(tcpsum);
1698 le->length = 0; /* initial checksum value */
1699 le->ctrl = 1; /* one packet */
1700 le->opcode = OP_TCPLISW | HW_OWNER;
1701 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001702 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001703 }
1704
1705 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001706 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001707 le->length = cpu_to_le16(len);
1708 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001709 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001710
Stephen Hemminger291ea612006-09-26 11:57:41 -07001711 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001712 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001713 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001714 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001715
1716 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001717 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001718
1719 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1720 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001721
1722 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001723 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001724 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001725 le->ctrl = 0;
1726 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001727 }
1728
1729 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001730 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001731 le->length = cpu_to_le16(frag->size);
1732 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001733 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001734
Stephen Hemminger291ea612006-09-26 11:57:41 -07001735 re = tx_le_re(sky2, le);
1736 re->skb = skb;
1737 pci_unmap_addr_set(re, mapaddr, mapping);
1738 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001739 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001740
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001741 le->ctrl |= EOP;
1742
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001743 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1744 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001745
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001746 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001747
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001748 dev->trans_start = jiffies;
1749 return NETDEV_TX_OK;
1750}
1751
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001752/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001753 * Free ring elements from starting at tx_cons until "done"
1754 *
1755 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001756 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001757 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001758static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001759{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001760 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001761 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001762 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001763
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001764 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001765
Stephen Hemminger291ea612006-09-26 11:57:41 -07001766 for (idx = sky2->tx_cons; idx != done;
1767 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1768 struct sky2_tx_le *le = sky2->tx_le + idx;
1769 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001770
Stephen Hemminger291ea612006-09-26 11:57:41 -07001771 switch(le->opcode & ~HW_OWNER) {
1772 case OP_LARGESEND:
1773 case OP_PACKET:
1774 pci_unmap_single(pdev,
1775 pci_unmap_addr(re, mapaddr),
1776 pci_unmap_len(re, maplen),
1777 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001778 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001779 case OP_BUFFER:
1780 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1781 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001782 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001783 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001784 }
1785
Stephen Hemminger291ea612006-09-26 11:57:41 -07001786 if (le->ctrl & EOP) {
1787 if (unlikely(netif_msg_tx_done(sky2)))
1788 printk(KERN_DEBUG "%s: tx done %u\n",
1789 dev->name, idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001790
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001791 dev->stats.tx_packets++;
1792 dev->stats.tx_bytes += re->skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001793
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001794 dev_kfree_skb_any(re->skb);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001795 sky2->tx_next = RING_NEXT(idx, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001796 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001797 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001798
Stephen Hemminger291ea612006-09-26 11:57:41 -07001799 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001800 smp_mb();
1801
Stephen Hemminger22e11702006-07-12 15:23:48 -07001802 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001803 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001804}
1805
1806/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001807static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001808{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001809 struct sky2_port *sky2 = netdev_priv(dev);
1810
1811 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001812 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001813 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001814}
1815
1816/* Network shutdown */
1817static int sky2_down(struct net_device *dev)
1818{
1819 struct sky2_port *sky2 = netdev_priv(dev);
1820 struct sky2_hw *hw = sky2->hw;
1821 unsigned port = sky2->port;
1822 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001823 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001824
Stephen Hemminger1b537562005-12-20 15:08:07 -08001825 /* Never really got started! */
1826 if (!sky2->tx_le)
1827 return 0;
1828
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001829 if (netif_msg_ifdown(sky2))
1830 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1831
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001832 /* Stop more packets from being queued */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001833 netif_stop_queue(dev);
1834
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001835 /* Disable port IRQ */
1836 imask = sky2_read32(hw, B0_IMSK);
1837 imask &= ~portirq_msk[port];
1838 sky2_write32(hw, B0_IMSK, imask);
1839
Stephen Hemminger6de16232007-10-17 13:26:42 -07001840 synchronize_irq(hw->pdev->irq);
1841
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001842 sky2_gmac_reset(hw, port);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001843
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001844 /* Stop transmitter */
1845 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1846 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1847
1848 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001849 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001850
1851 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001852 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001853 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1854
Stephen Hemminger6de16232007-10-17 13:26:42 -07001855 /* Make sure no packets are pending */
1856 napi_synchronize(&hw->napi);
1857
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001858 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1859
1860 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001861 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1862 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001863 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1864
1865 /* Disable Force Sync bit and Enable Alloc bit */
1866 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1867 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1868
1869 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1870 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1871 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1872
1873 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001874 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1875 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001876
1877 /* Reset the Tx prefetch units */
1878 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1879 PREF_UNIT_RST_SET);
1880
1881 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1882
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001883 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001884
1885 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1886 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1887
Stephen Hemmingerb96936da72008-05-14 17:04:15 -07001888 sky2_phy_power_down(hw, port);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001889
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001890 netif_carrier_off(dev);
1891
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001892 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001893 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1894
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001895 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001896 sky2_rx_clean(sky2);
1897
1898 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1899 sky2->rx_le, sky2->rx_le_map);
1900 kfree(sky2->rx_ring);
1901
1902 pci_free_consistent(hw->pdev,
1903 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1904 sky2->tx_le, sky2->tx_le_map);
1905 kfree(sky2->tx_ring);
1906
Stephen Hemminger1b537562005-12-20 15:08:07 -08001907 sky2->tx_le = NULL;
1908 sky2->rx_le = NULL;
1909
1910 sky2->rx_ring = NULL;
1911 sky2->tx_ring = NULL;
1912
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001913 return 0;
1914}
1915
1916static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1917{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001918 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001919 return SPEED_1000;
1920
Stephen Hemminger05745c42007-09-19 15:36:45 -07001921 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1922 if (aux & PHY_M_PS_SPEED_100)
1923 return SPEED_100;
1924 else
1925 return SPEED_10;
1926 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001927
1928 switch (aux & PHY_M_PS_SPEED_MSK) {
1929 case PHY_M_PS_SPEED_1000:
1930 return SPEED_1000;
1931 case PHY_M_PS_SPEED_100:
1932 return SPEED_100;
1933 default:
1934 return SPEED_10;
1935 }
1936}
1937
1938static void sky2_link_up(struct sky2_port *sky2)
1939{
1940 struct sky2_hw *hw = sky2->hw;
1941 unsigned port = sky2->port;
1942 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001943 static const char *fc_name[] = {
1944 [FC_NONE] = "none",
1945 [FC_TX] = "tx",
1946 [FC_RX] = "rx",
1947 [FC_BOTH] = "both",
1948 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001949
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001950 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001951 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001952 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1953 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001954
1955 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1956
1957 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001958
Stephen Hemminger75e80682007-09-19 15:36:46 -07001959 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07001960
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001961 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001962 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001963 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1964
1965 if (netif_msg_link(sky2))
1966 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001967 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001968 sky2->netdev->name, sky2->speed,
1969 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001970 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001971}
1972
1973static void sky2_link_down(struct sky2_port *sky2)
1974{
1975 struct sky2_hw *hw = sky2->hw;
1976 unsigned port = sky2->port;
1977 u16 reg;
1978
1979 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1980
1981 reg = gma_read16(hw, port, GM_GP_CTRL);
1982 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1983 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001984
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001985 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001986
1987 /* Turn on link LED */
1988 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1989
1990 if (netif_msg_link(sky2))
1991 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001992
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001993 sky2_phy_init(hw, port);
1994}
1995
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001996static enum flow_control sky2_flow(int rx, int tx)
1997{
1998 if (rx)
1999 return tx ? FC_BOTH : FC_RX;
2000 else
2001 return tx ? FC_TX : FC_NONE;
2002}
2003
Stephen Hemminger793b8832005-09-14 16:06:14 -07002004static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
2005{
2006 struct sky2_hw *hw = sky2->hw;
2007 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002008 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002009
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002010 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002011 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002012 if (lpa & PHY_M_AN_RF) {
2013 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
2014 return -1;
2015 }
2016
Stephen Hemminger793b8832005-09-14 16:06:14 -07002017 if (!(aux & PHY_M_PS_SPDUP_RES)) {
2018 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
2019 sky2->netdev->name);
2020 return -1;
2021 }
2022
Stephen Hemminger793b8832005-09-14 16:06:14 -07002023 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002024 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002025
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002026 /* Since the pause result bits seem to in different positions on
2027 * different chips. look at registers.
2028 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002029 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002030 /* Shift for bits in fiber PHY */
2031 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2032 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002033
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002034 if (advert & ADVERTISE_1000XPAUSE)
2035 advert |= ADVERTISE_PAUSE_CAP;
2036 if (advert & ADVERTISE_1000XPSE_ASYM)
2037 advert |= ADVERTISE_PAUSE_ASYM;
2038 if (lpa & LPA_1000XPAUSE)
2039 lpa |= LPA_PAUSE_CAP;
2040 if (lpa & LPA_1000XPAUSE_ASYM)
2041 lpa |= LPA_PAUSE_ASYM;
2042 }
2043
2044 sky2->flow_status = FC_NONE;
2045 if (advert & ADVERTISE_PAUSE_CAP) {
2046 if (lpa & LPA_PAUSE_CAP)
2047 sky2->flow_status = FC_BOTH;
2048 else if (advert & ADVERTISE_PAUSE_ASYM)
2049 sky2->flow_status = FC_RX;
2050 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2051 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2052 sky2->flow_status = FC_TX;
2053 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002054
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002055 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger93745492007-02-06 10:45:43 -08002056 && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002057 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002058
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002059 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002060 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2061 else
2062 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2063
2064 return 0;
2065}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002066
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002067/* Interrupt from PHY */
2068static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002069{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002070 struct net_device *dev = hw->dev[port];
2071 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002072 u16 istatus, phystat;
2073
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002074 if (!netif_running(dev))
2075 return;
2076
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002077 spin_lock(&sky2->phy_lock);
2078 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2079 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2080
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002081 if (netif_msg_intr(sky2))
2082 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
2083 sky2->netdev->name, istatus, phystat);
2084
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002085 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002086 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002087 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002088 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002089 }
2090
Stephen Hemminger793b8832005-09-14 16:06:14 -07002091 if (istatus & PHY_M_IS_LSP_CHANGE)
2092 sky2->speed = sky2_phy_speed(hw, phystat);
2093
2094 if (istatus & PHY_M_IS_DUP_CHANGE)
2095 sky2->duplex =
2096 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2097
2098 if (istatus & PHY_M_IS_LST_CHANGE) {
2099 if (phystat & PHY_M_PS_LINK_UP)
2100 sky2_link_up(sky2);
2101 else
2102 sky2_link_down(sky2);
2103 }
2104out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002105 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002106}
2107
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002108/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002109 * and tx queue is full (stopped).
2110 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002111static void sky2_tx_timeout(struct net_device *dev)
2112{
2113 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002114 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002115
2116 if (netif_msg_timer(sky2))
2117 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
2118
Stephen Hemminger8f246642006-03-20 15:48:21 -08002119 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002120 dev->name, sky2->tx_cons, sky2->tx_prod,
2121 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2122 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002123
Stephen Hemminger81906792007-02-15 16:40:33 -08002124 /* can't restart safely under softirq */
2125 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002126}
2127
2128static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2129{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002130 struct sky2_port *sky2 = netdev_priv(dev);
2131 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002132 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002133 int err;
2134 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002135 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002136
2137 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2138 return -EINVAL;
2139
Stephen Hemminger05745c42007-09-19 15:36:45 -07002140 if (new_mtu > ETH_DATA_LEN &&
2141 (hw->chip_id == CHIP_ID_YUKON_FE ||
2142 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002143 return -EINVAL;
2144
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002145 if (!netif_running(dev)) {
2146 dev->mtu = new_mtu;
2147 return 0;
2148 }
2149
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002150 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002151 sky2_write32(hw, B0_IMSK, 0);
2152
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002153 dev->trans_start = jiffies; /* prevent tx timeout */
2154 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002155 napi_disable(&hw->napi);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002156
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002157 synchronize_irq(hw->pdev->irq);
2158
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002159 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002160 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002161
2162 ctl = gma_read16(hw, port, GM_GP_CTRL);
2163 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002164 sky2_rx_stop(sky2);
2165 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002166
2167 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002168
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002169 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2170 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002171
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002172 if (dev->mtu > ETH_DATA_LEN)
2173 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002174
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002175 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002176
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002177 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002178
2179 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002180 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002181
David S. Millerd1d08d12008-01-07 20:53:33 -08002182 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002183 napi_enable(&hw->napi);
2184
Stephen Hemminger1b537562005-12-20 15:08:07 -08002185 if (err)
2186 dev_close(dev);
2187 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002188 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002189
Stephen Hemminger1b537562005-12-20 15:08:07 -08002190 netif_wake_queue(dev);
2191 }
2192
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002193 return err;
2194}
2195
Stephen Hemminger14d02632006-09-26 11:57:43 -07002196/* For small just reuse existing skb for next receive */
2197static struct sk_buff *receive_copy(struct sky2_port *sky2,
2198 const struct rx_ring_info *re,
2199 unsigned length)
2200{
2201 struct sk_buff *skb;
2202
2203 skb = netdev_alloc_skb(sky2->netdev, length + 2);
2204 if (likely(skb)) {
2205 skb_reserve(skb, 2);
2206 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2207 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002208 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002209 skb->ip_summed = re->skb->ip_summed;
2210 skb->csum = re->skb->csum;
2211 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2212 length, PCI_DMA_FROMDEVICE);
2213 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002214 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002215 }
2216 return skb;
2217}
2218
2219/* Adjust length of skb with fragments to match received data */
2220static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2221 unsigned int length)
2222{
2223 int i, num_frags;
2224 unsigned int size;
2225
2226 /* put header into skb */
2227 size = min(length, hdr_space);
2228 skb->tail += size;
2229 skb->len += size;
2230 length -= size;
2231
2232 num_frags = skb_shinfo(skb)->nr_frags;
2233 for (i = 0; i < num_frags; i++) {
2234 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2235
2236 if (length == 0) {
2237 /* don't need this page */
2238 __free_page(frag->page);
2239 --skb_shinfo(skb)->nr_frags;
2240 } else {
2241 size = min(length, (unsigned) PAGE_SIZE);
2242
2243 frag->size = size;
2244 skb->data_len += size;
2245 skb->truesize += size;
2246 skb->len += size;
2247 length -= size;
2248 }
2249 }
2250}
2251
2252/* Normal packet - take skb from ring element and put in a new one */
2253static struct sk_buff *receive_new(struct sky2_port *sky2,
2254 struct rx_ring_info *re,
2255 unsigned int length)
2256{
2257 struct sk_buff *skb, *nskb;
2258 unsigned hdr_space = sky2->rx_data_size;
2259
Stephen Hemminger14d02632006-09-26 11:57:43 -07002260 /* Don't be tricky about reusing pages (yet) */
2261 nskb = sky2_rx_alloc(sky2);
2262 if (unlikely(!nskb))
2263 return NULL;
2264
2265 skb = re->skb;
2266 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2267
2268 prefetch(skb->data);
2269 re->skb = nskb;
2270 sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space);
2271
2272 if (skb_shinfo(skb)->nr_frags)
2273 skb_put_frags(skb, hdr_space, length);
2274 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002275 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002276 return skb;
2277}
2278
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002279/*
2280 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002281 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002282 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002283static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002284 u16 length, u32 status)
2285{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002286 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002287 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002288 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002289 u16 count = (status & GMR_FS_LEN) >> 16;
2290
2291#ifdef SKY2_VLAN_TAG_USED
2292 /* Account for vlan tag */
2293 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2294 count -= VLAN_HLEN;
2295#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002296
2297 if (unlikely(netif_msg_rx_status(sky2)))
2298 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002299 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002300
Stephen Hemminger793b8832005-09-14 16:06:14 -07002301 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002302 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002303
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002304 /* This chip has hardware problems that generates bogus status.
2305 * So do only marginal checking and expect higher level protocols
2306 * to handle crap frames.
2307 */
2308 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2309 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2310 length != count)
2311 goto okay;
2312
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002313 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002314 goto error;
2315
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002316 if (!(status & GMR_FS_RX_OK))
2317 goto resubmit;
2318
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002319 /* if length reported by DMA does not match PHY, packet was truncated */
2320 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002321 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002322
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002323okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002324 if (length < copybreak)
2325 skb = receive_copy(sky2, re, length);
2326 else
2327 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002328resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002329 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002330
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002331 return skb;
2332
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002333len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002334 /* Truncation of overlength packets
2335 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002336 ++dev->stats.rx_length_errors;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002337 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002338 pr_info(PFX "%s: rx length error: status %#x length %d\n",
2339 dev->name, status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002340 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002341
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002342error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002343 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002344 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002345 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002346 goto resubmit;
2347 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002348
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002349 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002350 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002351 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002352
2353 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002354 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002355 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002356 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002357 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002358 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002359
Stephen Hemminger793b8832005-09-14 16:06:14 -07002360 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002361}
2362
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002363/* Transmit complete */
2364static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002365{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002366 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002367
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002368 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002369 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002370 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002371 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002372 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002373}
2374
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002375/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002376static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002377{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002378 int work_done = 0;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002379 unsigned rx[2] = { 0, 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002380
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002381 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002382 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002383 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002384 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002385 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002386 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002387 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002388 u32 status;
2389 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002390 u8 opcode = le->opcode;
2391
2392 if (!(opcode & HW_OWNER))
2393 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002394
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002395 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002396
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002397 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002398 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002399 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002400 length = le16_to_cpu(le->length);
2401 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002402
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002403 le->opcode = 0;
2404 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002405 case OP_RXSTAT:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002406 ++rx[port];
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002407 skb = sky2_receive(dev, length, status);
Stephen Hemminger3225b912007-05-14 12:38:12 -07002408 if (unlikely(!skb)) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002409 dev->stats.rx_dropped++;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002410 break;
Stephen Hemminger3225b912007-05-14 12:38:12 -07002411 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002412
Stephen Hemminger69161612007-06-04 17:23:26 -07002413 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002414 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger69161612007-06-04 17:23:26 -07002415 if (sky2->rx_csum &&
2416 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2417 (le->css & CSS_TCPUDPCSOK))
2418 skb->ip_summed = CHECKSUM_UNNECESSARY;
2419 else
2420 skb->ip_summed = CHECKSUM_NONE;
2421 }
2422
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002423 skb->protocol = eth_type_trans(skb, dev);
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002424 dev->stats.rx_packets++;
2425 dev->stats.rx_bytes += skb->len;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002426 dev->last_rx = jiffies;
2427
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002428#ifdef SKY2_VLAN_TAG_USED
2429 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2430 vlan_hwaccel_receive_skb(skb,
2431 sky2->vlgrp,
2432 be16_to_cpu(sky2->rx_tag));
2433 } else
2434#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002435 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002436
Stephen Hemminger22e11702006-07-12 15:23:48 -07002437 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002438 if (++work_done >= to_do)
2439 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002440 break;
2441
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002442#ifdef SKY2_VLAN_TAG_USED
2443 case OP_RXVLAN:
2444 sky2->rx_tag = length;
2445 break;
2446
2447 case OP_RXCHKSVLAN:
2448 sky2->rx_tag = length;
2449 /* fall through */
2450#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002451 case OP_RXCHKS:
Stephen Hemminger87418302007-03-08 12:42:30 -08002452 if (!sky2->rx_csum)
2453 break;
2454
Stephen Hemminger05745c42007-09-19 15:36:45 -07002455 /* If this happens then driver assuming wrong format */
2456 if (unlikely(hw->flags & SKY2_HW_NEW_LE)) {
2457 if (net_ratelimit())
2458 printk(KERN_NOTICE "%s: unexpected"
2459 " checksum status\n",
2460 dev->name);
Stephen Hemminger69161612007-06-04 17:23:26 -07002461 break;
Stephen Hemminger05745c42007-09-19 15:36:45 -07002462 }
Stephen Hemminger69161612007-06-04 17:23:26 -07002463
Stephen Hemminger87418302007-03-08 12:42:30 -08002464 /* Both checksum counters are programmed to start at
2465 * the same offset, so unless there is a problem they
2466 * should match. This failure is an early indication that
2467 * hardware receive checksumming won't work.
2468 */
2469 if (likely(status >> 16 == (status & 0xffff))) {
2470 skb = sky2->rx_ring[sky2->rx_next].skb;
2471 skb->ip_summed = CHECKSUM_COMPLETE;
2472 skb->csum = status & 0xffff;
2473 } else {
2474 printk(KERN_NOTICE PFX "%s: hardware receive "
2475 "checksum problem (status = %#x)\n",
2476 dev->name, status);
2477 sky2->rx_csum = 0;
2478 sky2_write32(sky2->hw,
Stephen Hemminger69161612007-06-04 17:23:26 -07002479 Q_ADDR(rxqaddr[port], Q_CSR),
Stephen Hemminger87418302007-03-08 12:42:30 -08002480 BMU_DIS_RX_CHKSUM);
2481 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002482 break;
2483
2484 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002485 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002486 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2487 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002488 if (hw->dev[1])
2489 sky2_tx_done(hw->dev[1],
2490 ((status >> 24) & 0xff)
2491 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002492 break;
2493
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002494 default:
2495 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002496 printk(KERN_WARNING PFX
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002497 "unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002498 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002499 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002500
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002501 /* Fully processed status ring so clear irq */
2502 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2503
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002504exit_loop:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002505 if (rx[0])
2506 sky2_rx_update(netdev_priv(hw->dev[0]), Q_R1);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002507
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002508 if (rx[1])
2509 sky2_rx_update(netdev_priv(hw->dev[1]), Q_R2);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002510
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002511 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002512}
2513
2514static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2515{
2516 struct net_device *dev = hw->dev[port];
2517
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002518 if (net_ratelimit())
2519 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2520 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002521
2522 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002523 if (net_ratelimit())
2524 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2525 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002526 /* Clear IRQ */
2527 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2528 }
2529
2530 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002531 if (net_ratelimit())
2532 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2533 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002534
2535 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2536 }
2537
2538 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002539 if (net_ratelimit())
2540 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002541 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2542 }
2543
2544 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002545 if (net_ratelimit())
2546 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002547 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2548 }
2549
2550 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002551 if (net_ratelimit())
2552 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2553 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002554 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2555 }
2556}
2557
2558static void sky2_hw_intr(struct sky2_hw *hw)
2559{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002560 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002561 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002562 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2563
2564 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002565
Stephen Hemminger793b8832005-09-14 16:06:14 -07002566 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002567 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002568
2569 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002570 u16 pci_err;
2571
Stephen Hemminger82637e82008-01-23 19:16:04 -08002572 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002573 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002574 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002575 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002576 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002577
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002578 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002579 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002580 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002581 }
2582
2583 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002584 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002585 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002586
Stephen Hemminger82637e82008-01-23 19:16:04 -08002587 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002588 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2589 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2590 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002591 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002592 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002593
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002594 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002595 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002596 }
2597
2598 if (status & Y2_HWE_L1_MASK)
2599 sky2_hw_error(hw, 0, status);
2600 status >>= 8;
2601 if (status & Y2_HWE_L1_MASK)
2602 sky2_hw_error(hw, 1, status);
2603}
2604
2605static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2606{
2607 struct net_device *dev = hw->dev[port];
2608 struct sky2_port *sky2 = netdev_priv(dev);
2609 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2610
2611 if (netif_msg_intr(sky2))
2612 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2613 dev->name, status);
2614
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002615 if (status & GM_IS_RX_CO_OV)
2616 gma_read16(hw, port, GM_RX_IRQ_SRC);
2617
2618 if (status & GM_IS_TX_CO_OV)
2619 gma_read16(hw, port, GM_TX_IRQ_SRC);
2620
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002621 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002622 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002623 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2624 }
2625
2626 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002627 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002628 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2629 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002630}
2631
Stephen Hemminger40b01722007-04-11 14:47:59 -07002632/* This should never happen it is a bug. */
2633static void sky2_le_error(struct sky2_hw *hw, unsigned port,
2634 u16 q, unsigned ring_size)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002635{
2636 struct net_device *dev = hw->dev[port];
2637 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002638 unsigned idx;
2639 const u64 *le = (q == Q_R1 || q == Q_R2)
2640 ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le;
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002641
Stephen Hemminger40b01722007-04-11 14:47:59 -07002642 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
2643 printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n",
2644 dev->name, (unsigned) q, idx, (unsigned long long) le[idx],
2645 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002646
Stephen Hemminger40b01722007-04-11 14:47:59 -07002647 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002648}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002649
Stephen Hemminger75e80682007-09-19 15:36:46 -07002650static int sky2_rx_hung(struct net_device *dev)
2651{
2652 struct sky2_port *sky2 = netdev_priv(dev);
2653 struct sky2_hw *hw = sky2->hw;
2654 unsigned port = sky2->port;
2655 unsigned rxq = rxqaddr[port];
2656 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2657 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2658 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2659 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2660
2661 /* If idle and MAC or PCI is stuck */
2662 if (sky2->check.last == dev->last_rx &&
2663 ((mac_rp == sky2->check.mac_rp &&
2664 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2665 /* Check if the PCI RX hang */
2666 (fifo_rp == sky2->check.fifo_rp &&
2667 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
2668 printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n",
2669 dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp,
2670 sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
2671 return 1;
2672 } else {
2673 sky2->check.last = dev->last_rx;
2674 sky2->check.mac_rp = mac_rp;
2675 sky2->check.mac_lev = mac_lev;
2676 sky2->check.fifo_rp = fifo_rp;
2677 sky2->check.fifo_lev = fifo_lev;
2678 return 0;
2679 }
2680}
2681
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002682static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002683{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002684 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002685
Stephen Hemminger75e80682007-09-19 15:36:46 -07002686 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002687 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002688 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002689 } else {
2690 int i, active = 0;
2691
2692 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002693 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002694 if (!netif_running(dev))
2695 continue;
2696 ++active;
2697
2698 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002699 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002700 sky2_rx_hung(dev)) {
2701 pr_info(PFX "%s: receiver hang detected\n",
2702 dev->name);
2703 schedule_work(&hw->restart_work);
2704 return;
2705 }
2706 }
2707
2708 if (active == 0)
2709 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002710 }
2711
Stephen Hemminger75e80682007-09-19 15:36:46 -07002712 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002713}
2714
Stephen Hemminger40b01722007-04-11 14:47:59 -07002715/* Hardware/software error handling */
2716static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002717{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002718 if (net_ratelimit())
2719 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002720
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002721 if (status & Y2_IS_HW_ERR)
2722 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002723
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002724 if (status & Y2_IS_IRQ_MAC1)
2725 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002726
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002727 if (status & Y2_IS_IRQ_MAC2)
2728 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002729
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002730 if (status & Y2_IS_CHK_RX1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002731 sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002732
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002733 if (status & Y2_IS_CHK_RX2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002734 sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002735
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002736 if (status & Y2_IS_CHK_TXA1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002737 sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002738
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002739 if (status & Y2_IS_CHK_TXA2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002740 sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE);
2741}
2742
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002743static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002744{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002745 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002746 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002747 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002748 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002749
2750 if (unlikely(status & Y2_IS_ERROR))
2751 sky2_err_intr(hw, status);
2752
2753 if (status & Y2_IS_IRQ_PHY1)
2754 sky2_phy_intr(hw, 0);
2755
2756 if (status & Y2_IS_IRQ_PHY2)
2757 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002758
Stephen Hemminger26691832007-10-11 18:31:13 -07002759 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2760 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002761
David S. Miller6f535762007-10-11 18:08:29 -07002762 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002763 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002764 }
David S. Miller6f535762007-10-11 18:08:29 -07002765
Stephen Hemminger26691832007-10-11 18:31:13 -07002766 /* Bug/Errata workaround?
2767 * Need to kick the TX irq moderation timer.
2768 */
2769 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
2770 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
2771 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2772 }
2773 napi_complete(napi);
2774 sky2_read32(hw, B0_Y2_SP_LISR);
2775done:
2776
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002777 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002778}
2779
David Howells7d12e782006-10-05 14:55:46 +01002780static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002781{
2782 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002783 u32 status;
2784
2785 /* Reading this mask interrupts as side effect */
2786 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2787 if (status == 0 || status == ~0)
2788 return IRQ_NONE;
2789
2790 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002791
2792 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002793
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002794 return IRQ_HANDLED;
2795}
2796
2797#ifdef CONFIG_NET_POLL_CONTROLLER
2798static void sky2_netpoll(struct net_device *dev)
2799{
2800 struct sky2_port *sky2 = netdev_priv(dev);
2801
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002802 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002803}
2804#endif
2805
2806/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002807static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002808{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002809 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002810 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002811 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002812 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002813 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002814 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002815 return 125;
2816
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002817 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002818 return 100;
2819
2820 case CHIP_ID_YUKON_FE_P:
2821 return 50;
2822
2823 case CHIP_ID_YUKON_XL:
2824 return 156;
2825
2826 default:
2827 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002828 }
2829}
2830
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002831static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2832{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002833 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002834}
2835
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002836static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2837{
2838 return clk / sky2_mhz(hw);
2839}
2840
2841
Stephen Hemmingere3173832007-02-06 10:45:39 -08002842static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002843{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002844 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002845
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002846 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002847 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07002848
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002849 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002850
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002851 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002852 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2853
2854 switch(hw->chip_id) {
2855 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002856 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002857 break;
2858
2859 case CHIP_ID_YUKON_EC_U:
2860 hw->flags = SKY2_HW_GIGABIT
2861 | SKY2_HW_NEWER_PHY
2862 | SKY2_HW_ADV_POWER_CTL;
Stephen Hemmingera068c0a2008-05-14 17:04:17 -07002863
2864 /* check for Rev. A1 dev 4200 */
2865 if (sky2_read16(hw, Q_ADDR(Q_XA1, Q_WM)) == 0)
2866 hw->flags |= SKY2_HW_CLK_POWER;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002867 break;
2868
2869 case CHIP_ID_YUKON_EX:
2870 hw->flags = SKY2_HW_GIGABIT
2871 | SKY2_HW_NEWER_PHY
2872 | SKY2_HW_NEW_LE
2873 | SKY2_HW_ADV_POWER_CTL;
2874
2875 /* New transmit checksum */
2876 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2877 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2878 break;
2879
2880 case CHIP_ID_YUKON_EC:
2881 /* This rev is really old, and requires untested workarounds */
2882 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2883 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2884 return -EOPNOTSUPP;
2885 }
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002886 hw->flags = SKY2_HW_GIGABIT;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002887 break;
2888
2889 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002890 break;
2891
Stephen Hemminger05745c42007-09-19 15:36:45 -07002892 case CHIP_ID_YUKON_FE_P:
2893 hw->flags = SKY2_HW_NEWER_PHY
2894 | SKY2_HW_NEW_LE
2895 | SKY2_HW_AUTO_TX_SUM
2896 | SKY2_HW_ADV_POWER_CTL;
2897 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002898
2899 case CHIP_ID_YUKON_SUPR:
2900 hw->flags = SKY2_HW_GIGABIT
2901 | SKY2_HW_NEWER_PHY
2902 | SKY2_HW_NEW_LE
2903 | SKY2_HW_AUTO_TX_SUM
2904 | SKY2_HW_ADV_POWER_CTL;
2905 break;
2906
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002907 case CHIP_ID_YUKON_UL_2:
2908 hw->flags = SKY2_HW_GIGABIT
2909 | SKY2_HW_ADV_POWER_CTL;
2910 break;
2911
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002912 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002913 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2914 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002915 return -EOPNOTSUPP;
2916 }
2917
Stephen Hemmingere3173832007-02-06 10:45:39 -08002918 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002919 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
2920 hw->flags |= SKY2_HW_FIBRE_PHY;
2921
Stephen Hemmingera068c0a2008-05-14 17:04:17 -07002922 hw->pm_cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PM);
2923 if (hw->pm_cap == 0) {
2924 dev_err(&hw->pdev->dev, "cannot find PowerManagement capability\n");
2925 return -EIO;
2926 }
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002927
Stephen Hemmingere3173832007-02-06 10:45:39 -08002928 hw->ports = 1;
2929 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2930 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2931 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2932 ++hw->ports;
2933 }
2934
2935 return 0;
2936}
2937
2938static void sky2_reset(struct sky2_hw *hw)
2939{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002940 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002941 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07002942 int i, cap;
2943 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002944
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002945 /* disable ASF */
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07002946 if (hw->chip_id == CHIP_ID_YUKON_EX) {
2947 status = sky2_read16(hw, HCU_CCSR);
2948 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
2949 HCU_CCSR_UC_STATE_MSK);
2950 sky2_write16(hw, HCU_CCSR, status);
2951 } else
2952 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2953 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002954
2955 /* do a SW reset */
2956 sky2_write8(hw, B0_CTST, CS_RST_SET);
2957 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2958
Stephen Hemmingerac93a392007-11-05 15:52:08 -08002959 /* allow writes to PCI config */
2960 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2961
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002962 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002963 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002964 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002965 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002966
2967 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2968
Stephen Hemminger555382c2007-08-29 12:58:14 -07002969 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2970 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002971 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2972 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002973
Stephen Hemminger555382c2007-08-29 12:58:14 -07002974 /* If error bit is stuck on ignore it */
2975 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
2976 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002977 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07002978 hwe_mask |= Y2_IS_PCI_EXP;
2979 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002980
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002981 sky2_power_on(hw);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002982 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002983
2984 for (i = 0; i < hw->ports; i++) {
2985 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2986 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07002987
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002988 if (hw->chip_id == CHIP_ID_YUKON_EX ||
2989 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07002990 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
2991 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
2992 | GMC_BYP_RETR_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002993 }
2994
Stephen Hemminger793b8832005-09-14 16:06:14 -07002995 /* Clear I2C IRQ noise */
2996 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002997
2998 /* turn off hardware timer (unused) */
2999 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3000 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003001
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003002 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
3003
Stephen Hemminger69634ee2005-12-09 11:35:06 -08003004 /* Turn off descriptor polling */
3005 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003006
3007 /* Turn off receive timestamp */
3008 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003009 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003010
3011 /* enable the Tx Arbiters */
3012 for (i = 0; i < hw->ports; i++)
3013 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3014
3015 /* Initialize ram interface */
3016 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003017 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003018
3019 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3020 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3021 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3022 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3023 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3024 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3025 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3026 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3027 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3028 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3029 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3030 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3031 }
3032
Stephen Hemminger555382c2007-08-29 12:58:14 -07003033 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003034
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003035 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003036 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003037
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003038 memset(hw->st_le, 0, STATUS_LE_BYTES);
3039 hw->st_idx = 0;
3040
3041 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3042 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3043
3044 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003045 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003046
3047 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003048 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003049
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003050 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3051 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003052
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003053 /* set Status-FIFO ISR watermark */
3054 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3055 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3056 else
3057 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003058
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003059 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003060 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3061 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003062
Stephen Hemminger793b8832005-09-14 16:06:14 -07003063 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003064 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3065
3066 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3067 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3068 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003069}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003070
Stephen Hemminger81906792007-02-15 16:40:33 -08003071static void sky2_restart(struct work_struct *work)
3072{
3073 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
3074 struct net_device *dev;
3075 int i, err;
3076
Stephen Hemminger81906792007-02-15 16:40:33 -08003077 rtnl_lock();
Stephen Hemminger81906792007-02-15 16:40:33 -08003078 for (i = 0; i < hw->ports; i++) {
3079 dev = hw->dev[i];
3080 if (netif_running(dev))
3081 sky2_down(dev);
3082 }
3083
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003084 napi_disable(&hw->napi);
3085 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger81906792007-02-15 16:40:33 -08003086 sky2_reset(hw);
3087 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07003088 napi_enable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003089
3090 for (i = 0; i < hw->ports; i++) {
3091 dev = hw->dev[i];
3092 if (netif_running(dev)) {
3093 err = sky2_up(dev);
3094 if (err) {
3095 printk(KERN_INFO PFX "%s: could not restart %d\n",
3096 dev->name, err);
3097 dev_close(dev);
3098 }
3099 }
3100 }
3101
Stephen Hemminger81906792007-02-15 16:40:33 -08003102 rtnl_unlock();
3103}
3104
Stephen Hemmingere3173832007-02-06 10:45:39 -08003105static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3106{
3107 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3108}
3109
3110static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3111{
3112 const struct sky2_port *sky2 = netdev_priv(dev);
3113
3114 wol->supported = sky2_wol_supported(sky2->hw);
3115 wol->wolopts = sky2->wol;
3116}
3117
3118static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3119{
3120 struct sky2_port *sky2 = netdev_priv(dev);
3121 struct sky2_hw *hw = sky2->hw;
3122
3123 if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
3124 return -EOPNOTSUPP;
3125
3126 sky2->wol = wol->wolopts;
3127
Stephen Hemminger05745c42007-09-19 15:36:45 -07003128 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3129 hw->chip_id == CHIP_ID_YUKON_EX ||
3130 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingere3173832007-02-06 10:45:39 -08003131 sky2_write32(hw, B0_CTST, sky2->wol
3132 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
3133
3134 if (!netif_running(dev))
3135 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003136 return 0;
3137}
3138
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003139static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003140{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003141 if (sky2_is_copper(hw)) {
3142 u32 modes = SUPPORTED_10baseT_Half
3143 | SUPPORTED_10baseT_Full
3144 | SUPPORTED_100baseT_Half
3145 | SUPPORTED_100baseT_Full
3146 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003147
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003148 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003149 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003150 | SUPPORTED_1000baseT_Full;
3151 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003152 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003153 return SUPPORTED_1000baseT_Half
3154 | SUPPORTED_1000baseT_Full
3155 | SUPPORTED_Autoneg
3156 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003157}
3158
Stephen Hemminger793b8832005-09-14 16:06:14 -07003159static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003160{
3161 struct sky2_port *sky2 = netdev_priv(dev);
3162 struct sky2_hw *hw = sky2->hw;
3163
3164 ecmd->transceiver = XCVR_INTERNAL;
3165 ecmd->supported = sky2_supported_modes(hw);
3166 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003167 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003168 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003169 ecmd->speed = sky2->speed;
3170 } else {
3171 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003172 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003173 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003174
3175 ecmd->advertising = sky2->advertising;
3176 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003177 ecmd->duplex = sky2->duplex;
3178 return 0;
3179}
3180
3181static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3182{
3183 struct sky2_port *sky2 = netdev_priv(dev);
3184 const struct sky2_hw *hw = sky2->hw;
3185 u32 supported = sky2_supported_modes(hw);
3186
3187 if (ecmd->autoneg == AUTONEG_ENABLE) {
3188 ecmd->advertising = supported;
3189 sky2->duplex = -1;
3190 sky2->speed = -1;
3191 } else {
3192 u32 setting;
3193
Stephen Hemminger793b8832005-09-14 16:06:14 -07003194 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003195 case SPEED_1000:
3196 if (ecmd->duplex == DUPLEX_FULL)
3197 setting = SUPPORTED_1000baseT_Full;
3198 else if (ecmd->duplex == DUPLEX_HALF)
3199 setting = SUPPORTED_1000baseT_Half;
3200 else
3201 return -EINVAL;
3202 break;
3203 case SPEED_100:
3204 if (ecmd->duplex == DUPLEX_FULL)
3205 setting = SUPPORTED_100baseT_Full;
3206 else if (ecmd->duplex == DUPLEX_HALF)
3207 setting = SUPPORTED_100baseT_Half;
3208 else
3209 return -EINVAL;
3210 break;
3211
3212 case SPEED_10:
3213 if (ecmd->duplex == DUPLEX_FULL)
3214 setting = SUPPORTED_10baseT_Full;
3215 else if (ecmd->duplex == DUPLEX_HALF)
3216 setting = SUPPORTED_10baseT_Half;
3217 else
3218 return -EINVAL;
3219 break;
3220 default:
3221 return -EINVAL;
3222 }
3223
3224 if ((setting & supported) == 0)
3225 return -EINVAL;
3226
3227 sky2->speed = ecmd->speed;
3228 sky2->duplex = ecmd->duplex;
3229 }
3230
3231 sky2->autoneg = ecmd->autoneg;
3232 sky2->advertising = ecmd->advertising;
3233
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003234 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003235 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003236 sky2_set_multicast(dev);
3237 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003238
3239 return 0;
3240}
3241
3242static void sky2_get_drvinfo(struct net_device *dev,
3243 struct ethtool_drvinfo *info)
3244{
3245 struct sky2_port *sky2 = netdev_priv(dev);
3246
3247 strcpy(info->driver, DRV_NAME);
3248 strcpy(info->version, DRV_VERSION);
3249 strcpy(info->fw_version, "N/A");
3250 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3251}
3252
3253static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003254 char name[ETH_GSTRING_LEN];
3255 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003256} sky2_stats[] = {
3257 { "tx_bytes", GM_TXO_OK_HI },
3258 { "rx_bytes", GM_RXO_OK_HI },
3259 { "tx_broadcast", GM_TXF_BC_OK },
3260 { "rx_broadcast", GM_RXF_BC_OK },
3261 { "tx_multicast", GM_TXF_MC_OK },
3262 { "rx_multicast", GM_RXF_MC_OK },
3263 { "tx_unicast", GM_TXF_UC_OK },
3264 { "rx_unicast", GM_RXF_UC_OK },
3265 { "tx_mac_pause", GM_TXF_MPAUSE },
3266 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003267 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003268 { "late_collision",GM_TXF_LAT_COL },
3269 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003270 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003271 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003272
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003273 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003274 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003275 { "rx_64_byte_packets", GM_RXF_64B },
3276 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3277 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3278 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3279 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3280 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3281 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003282 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003283 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3284 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003285 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003286
3287 { "tx_64_byte_packets", GM_TXF_64B },
3288 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3289 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3290 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3291 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3292 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3293 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3294 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003295};
3296
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003297static u32 sky2_get_rx_csum(struct net_device *dev)
3298{
3299 struct sky2_port *sky2 = netdev_priv(dev);
3300
3301 return sky2->rx_csum;
3302}
3303
3304static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3305{
3306 struct sky2_port *sky2 = netdev_priv(dev);
3307
3308 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003309
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003310 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3311 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3312
3313 return 0;
3314}
3315
3316static u32 sky2_get_msglevel(struct net_device *netdev)
3317{
3318 struct sky2_port *sky2 = netdev_priv(netdev);
3319 return sky2->msg_enable;
3320}
3321
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003322static int sky2_nway_reset(struct net_device *dev)
3323{
3324 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003325
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003326 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003327 return -EINVAL;
3328
Stephen Hemminger1b537562005-12-20 15:08:07 -08003329 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003330 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003331
3332 return 0;
3333}
3334
Stephen Hemminger793b8832005-09-14 16:06:14 -07003335static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003336{
3337 struct sky2_hw *hw = sky2->hw;
3338 unsigned port = sky2->port;
3339 int i;
3340
3341 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003342 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003343 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003344 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003345
Stephen Hemminger793b8832005-09-14 16:06:14 -07003346 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003347 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3348}
3349
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003350static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3351{
3352 struct sky2_port *sky2 = netdev_priv(netdev);
3353 sky2->msg_enable = value;
3354}
3355
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003356static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003357{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003358 switch (sset) {
3359 case ETH_SS_STATS:
3360 return ARRAY_SIZE(sky2_stats);
3361 default:
3362 return -EOPNOTSUPP;
3363 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003364}
3365
3366static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003367 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003368{
3369 struct sky2_port *sky2 = netdev_priv(dev);
3370
Stephen Hemminger793b8832005-09-14 16:06:14 -07003371 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003372}
3373
Stephen Hemminger793b8832005-09-14 16:06:14 -07003374static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003375{
3376 int i;
3377
3378 switch (stringset) {
3379 case ETH_SS_STATS:
3380 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3381 memcpy(data + i * ETH_GSTRING_LEN,
3382 sky2_stats[i].name, ETH_GSTRING_LEN);
3383 break;
3384 }
3385}
3386
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003387static int sky2_set_mac_address(struct net_device *dev, void *p)
3388{
3389 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003390 struct sky2_hw *hw = sky2->hw;
3391 unsigned port = sky2->port;
3392 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003393
3394 if (!is_valid_ether_addr(addr->sa_data))
3395 return -EADDRNOTAVAIL;
3396
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003397 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003398 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003399 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003400 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003401 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003402
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003403 /* virtual address for data */
3404 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3405
3406 /* physical address: used for pause frames */
3407 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003408
3409 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003410}
3411
Stephen Hemmingera052b522006-10-17 10:24:23 -07003412static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3413{
3414 u32 bit;
3415
3416 bit = ether_crc(ETH_ALEN, addr) & 63;
3417 filter[bit >> 3] |= 1 << (bit & 7);
3418}
3419
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003420static void sky2_set_multicast(struct net_device *dev)
3421{
3422 struct sky2_port *sky2 = netdev_priv(dev);
3423 struct sky2_hw *hw = sky2->hw;
3424 unsigned port = sky2->port;
3425 struct dev_mc_list *list = dev->mc_list;
3426 u16 reg;
3427 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003428 int rx_pause;
3429 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003430
Stephen Hemmingera052b522006-10-17 10:24:23 -07003431 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003432 memset(filter, 0, sizeof(filter));
3433
3434 reg = gma_read16(hw, port, GM_RX_CTRL);
3435 reg |= GM_RXCR_UCF_ENA;
3436
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003437 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003438 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003439 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003440 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07003441 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003442 reg &= ~GM_RXCR_MCF_ENA;
3443 else {
3444 int i;
3445 reg |= GM_RXCR_MCF_ENA;
3446
Stephen Hemmingera052b522006-10-17 10:24:23 -07003447 if (rx_pause)
3448 sky2_add_filter(filter, pause_mc_addr);
3449
3450 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
3451 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003452 }
3453
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003454 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003455 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003456 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003457 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003458 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003459 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003460 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003461 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003462
3463 gma_write16(hw, port, GM_RX_CTRL, reg);
3464}
3465
3466/* Can have one global because blinking is controlled by
3467 * ethtool and that is always under RTNL mutex
3468 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003469static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003470{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003471 struct sky2_hw *hw = sky2->hw;
3472 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003473
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003474 spin_lock_bh(&sky2->phy_lock);
3475 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3476 hw->chip_id == CHIP_ID_YUKON_EX ||
3477 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3478 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003479 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3480 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003481
3482 switch (mode) {
3483 case MO_LED_OFF:
3484 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3485 PHY_M_LEDC_LOS_CTRL(8) |
3486 PHY_M_LEDC_INIT_CTRL(8) |
3487 PHY_M_LEDC_STA1_CTRL(8) |
3488 PHY_M_LEDC_STA0_CTRL(8));
3489 break;
3490 case MO_LED_ON:
3491 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3492 PHY_M_LEDC_LOS_CTRL(9) |
3493 PHY_M_LEDC_INIT_CTRL(9) |
3494 PHY_M_LEDC_STA1_CTRL(9) |
3495 PHY_M_LEDC_STA0_CTRL(9));
3496 break;
3497 case MO_LED_BLINK:
3498 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3499 PHY_M_LEDC_LOS_CTRL(0xa) |
3500 PHY_M_LEDC_INIT_CTRL(0xa) |
3501 PHY_M_LEDC_STA1_CTRL(0xa) |
3502 PHY_M_LEDC_STA0_CTRL(0xa));
3503 break;
3504 case MO_LED_NORM:
3505 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3506 PHY_M_LEDC_LOS_CTRL(1) |
3507 PHY_M_LEDC_INIT_CTRL(8) |
3508 PHY_M_LEDC_STA1_CTRL(7) |
3509 PHY_M_LEDC_STA0_CTRL(7));
3510 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003511
3512 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003513 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003514 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003515 PHY_M_LED_MO_DUP(mode) |
3516 PHY_M_LED_MO_10(mode) |
3517 PHY_M_LED_MO_100(mode) |
3518 PHY_M_LED_MO_1000(mode) |
3519 PHY_M_LED_MO_RX(mode) |
3520 PHY_M_LED_MO_TX(mode));
3521
3522 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003523}
3524
3525/* blink LED's for finding board */
3526static int sky2_phys_id(struct net_device *dev, u32 data)
3527{
3528 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003529 unsigned int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003530
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003531 if (data == 0)
3532 data = UINT_MAX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003533
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003534 for (i = 0; i < data; i++) {
3535 sky2_led(sky2, MO_LED_ON);
3536 if (msleep_interruptible(500))
3537 break;
3538 sky2_led(sky2, MO_LED_OFF);
3539 if (msleep_interruptible(500))
3540 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003541 }
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003542 sky2_led(sky2, MO_LED_NORM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003543
3544 return 0;
3545}
3546
3547static void sky2_get_pauseparam(struct net_device *dev,
3548 struct ethtool_pauseparam *ecmd)
3549{
3550 struct sky2_port *sky2 = netdev_priv(dev);
3551
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003552 switch (sky2->flow_mode) {
3553 case FC_NONE:
3554 ecmd->tx_pause = ecmd->rx_pause = 0;
3555 break;
3556 case FC_TX:
3557 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3558 break;
3559 case FC_RX:
3560 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3561 break;
3562 case FC_BOTH:
3563 ecmd->tx_pause = ecmd->rx_pause = 1;
3564 }
3565
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003566 ecmd->autoneg = sky2->autoneg;
3567}
3568
3569static int sky2_set_pauseparam(struct net_device *dev,
3570 struct ethtool_pauseparam *ecmd)
3571{
3572 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003573
3574 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003575 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003576
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003577 if (netif_running(dev))
3578 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003579
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003580 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003581}
3582
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003583static int sky2_get_coalesce(struct net_device *dev,
3584 struct ethtool_coalesce *ecmd)
3585{
3586 struct sky2_port *sky2 = netdev_priv(dev);
3587 struct sky2_hw *hw = sky2->hw;
3588
3589 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3590 ecmd->tx_coalesce_usecs = 0;
3591 else {
3592 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3593 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3594 }
3595 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3596
3597 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3598 ecmd->rx_coalesce_usecs = 0;
3599 else {
3600 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3601 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3602 }
3603 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3604
3605 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3606 ecmd->rx_coalesce_usecs_irq = 0;
3607 else {
3608 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3609 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3610 }
3611
3612 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3613
3614 return 0;
3615}
3616
3617/* Note: this affect both ports */
3618static int sky2_set_coalesce(struct net_device *dev,
3619 struct ethtool_coalesce *ecmd)
3620{
3621 struct sky2_port *sky2 = netdev_priv(dev);
3622 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003623 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003624
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003625 if (ecmd->tx_coalesce_usecs > tmax ||
3626 ecmd->rx_coalesce_usecs > tmax ||
3627 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003628 return -EINVAL;
3629
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003630 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003631 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003632 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003633 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003634 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003635 return -EINVAL;
3636
3637 if (ecmd->tx_coalesce_usecs == 0)
3638 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3639 else {
3640 sky2_write32(hw, STAT_TX_TIMER_INI,
3641 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3642 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3643 }
3644 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3645
3646 if (ecmd->rx_coalesce_usecs == 0)
3647 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3648 else {
3649 sky2_write32(hw, STAT_LEV_TIMER_INI,
3650 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3651 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3652 }
3653 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3654
3655 if (ecmd->rx_coalesce_usecs_irq == 0)
3656 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3657 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003658 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003659 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3660 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3661 }
3662 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3663 return 0;
3664}
3665
Stephen Hemminger793b8832005-09-14 16:06:14 -07003666static void sky2_get_ringparam(struct net_device *dev,
3667 struct ethtool_ringparam *ering)
3668{
3669 struct sky2_port *sky2 = netdev_priv(dev);
3670
3671 ering->rx_max_pending = RX_MAX_PENDING;
3672 ering->rx_mini_max_pending = 0;
3673 ering->rx_jumbo_max_pending = 0;
3674 ering->tx_max_pending = TX_RING_SIZE - 1;
3675
3676 ering->rx_pending = sky2->rx_pending;
3677 ering->rx_mini_pending = 0;
3678 ering->rx_jumbo_pending = 0;
3679 ering->tx_pending = sky2->tx_pending;
3680}
3681
3682static int sky2_set_ringparam(struct net_device *dev,
3683 struct ethtool_ringparam *ering)
3684{
3685 struct sky2_port *sky2 = netdev_priv(dev);
3686 int err = 0;
3687
3688 if (ering->rx_pending > RX_MAX_PENDING ||
3689 ering->rx_pending < 8 ||
3690 ering->tx_pending < MAX_SKB_TX_LE ||
3691 ering->tx_pending > TX_RING_SIZE - 1)
3692 return -EINVAL;
3693
3694 if (netif_running(dev))
3695 sky2_down(dev);
3696
3697 sky2->rx_pending = ering->rx_pending;
3698 sky2->tx_pending = ering->tx_pending;
3699
Stephen Hemminger1b537562005-12-20 15:08:07 -08003700 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003701 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003702 if (err)
3703 dev_close(dev);
3704 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003705
3706 return err;
3707}
3708
Stephen Hemminger793b8832005-09-14 16:06:14 -07003709static int sky2_get_regs_len(struct net_device *dev)
3710{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003711 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003712}
3713
3714/*
3715 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003716 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003717 */
3718static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3719 void *p)
3720{
3721 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003722 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003723 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003724
3725 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003726
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003727 for (b = 0; b < 128; b++) {
3728 /* This complicated switch statement is to make sure and
3729 * only access regions that are unreserved.
3730 * Some blocks are only valid on dual port cards.
3731 * and block 3 has some special diagnostic registers that
3732 * are poison.
3733 */
3734 switch (b) {
3735 case 3:
3736 /* skip diagnostic ram region */
3737 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
3738 break;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003739
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003740 /* dual port cards only */
3741 case 5: /* Tx Arbiter 2 */
3742 case 9: /* RX2 */
3743 case 14 ... 15: /* TX2 */
3744 case 17: case 19: /* Ram Buffer 2 */
3745 case 22 ... 23: /* Tx Ram Buffer 2 */
3746 case 25: /* Rx MAC Fifo 1 */
3747 case 27: /* Tx MAC Fifo 2 */
3748 case 31: /* GPHY 2 */
3749 case 40 ... 47: /* Pattern Ram 2 */
3750 case 52: case 54: /* TCP Segmentation 2 */
3751 case 112 ... 116: /* GMAC 2 */
3752 if (sky2->hw->ports == 1)
3753 goto reserved;
3754 /* fall through */
3755 case 0: /* Control */
3756 case 2: /* Mac address */
3757 case 4: /* Tx Arbiter 1 */
3758 case 7: /* PCI express reg */
3759 case 8: /* RX1 */
3760 case 12 ... 13: /* TX1 */
3761 case 16: case 18:/* Rx Ram Buffer 1 */
3762 case 20 ... 21: /* Tx Ram Buffer 1 */
3763 case 24: /* Rx MAC Fifo 1 */
3764 case 26: /* Tx MAC Fifo 1 */
3765 case 28 ... 29: /* Descriptor and status unit */
3766 case 30: /* GPHY 1*/
3767 case 32 ... 39: /* Pattern Ram 1 */
3768 case 48: case 50: /* TCP Segmentation 1 */
3769 case 56 ... 60: /* PCI space */
3770 case 80 ... 84: /* GMAC 1 */
3771 memcpy_fromio(p, io, 128);
3772 break;
3773 default:
3774reserved:
3775 memset(p, 0, 128);
3776 }
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003777
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003778 p += 128;
3779 io += 128;
3780 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003781}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003782
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003783/* In order to do Jumbo packets on these chips, need to turn off the
3784 * transmit store/forward. Therefore checksum offload won't work.
3785 */
3786static int no_tx_offload(struct net_device *dev)
3787{
3788 const struct sky2_port *sky2 = netdev_priv(dev);
3789 const struct sky2_hw *hw = sky2->hw;
3790
Stephen Hemminger69161612007-06-04 17:23:26 -07003791 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003792}
3793
3794static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3795{
3796 if (data && no_tx_offload(dev))
3797 return -EINVAL;
3798
3799 return ethtool_op_set_tx_csum(dev, data);
3800}
3801
3802
3803static int sky2_set_tso(struct net_device *dev, u32 data)
3804{
3805 if (data && no_tx_offload(dev))
3806 return -EINVAL;
3807
3808 return ethtool_op_set_tso(dev, data);
3809}
3810
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003811static int sky2_get_eeprom_len(struct net_device *dev)
3812{
3813 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003814 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003815 u16 reg2;
3816
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003817 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003818 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3819}
3820
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003821static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003822{
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003823 u32 val;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003824
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003825 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003826
3827 do {
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003828 offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003829 } while (!(offset & PCI_VPD_ADDR_F));
3830
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003831 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003832 return val;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003833}
3834
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003835static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003836{
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003837 sky2_pci_write16(hw, cap + PCI_VPD_DATA, val);
3838 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003839 do {
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003840 offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003841 } while (offset & PCI_VPD_ADDR_F);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003842}
3843
3844static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3845 u8 *data)
3846{
3847 struct sky2_port *sky2 = netdev_priv(dev);
3848 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3849 int length = eeprom->len;
3850 u16 offset = eeprom->offset;
3851
3852 if (!cap)
3853 return -EINVAL;
3854
3855 eeprom->magic = SKY2_EEPROM_MAGIC;
3856
3857 while (length > 0) {
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003858 u32 val = sky2_vpd_read(sky2->hw, cap, offset);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003859 int n = min_t(int, length, sizeof(val));
3860
3861 memcpy(data, &val, n);
3862 length -= n;
3863 data += n;
3864 offset += n;
3865 }
3866 return 0;
3867}
3868
3869static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3870 u8 *data)
3871{
3872 struct sky2_port *sky2 = netdev_priv(dev);
3873 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3874 int length = eeprom->len;
3875 u16 offset = eeprom->offset;
3876
3877 if (!cap)
3878 return -EINVAL;
3879
3880 if (eeprom->magic != SKY2_EEPROM_MAGIC)
3881 return -EINVAL;
3882
3883 while (length > 0) {
3884 u32 val;
3885 int n = min_t(int, length, sizeof(val));
3886
3887 if (n < sizeof(val))
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003888 val = sky2_vpd_read(sky2->hw, cap, offset);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003889 memcpy(&val, data, n);
3890
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003891 sky2_vpd_write(sky2->hw, cap, offset, val);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003892
3893 length -= n;
3894 data += n;
3895 offset += n;
3896 }
3897 return 0;
3898}
3899
3900
Jeff Garzik7282d492006-09-13 14:30:00 -04003901static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003902 .get_settings = sky2_get_settings,
3903 .set_settings = sky2_set_settings,
3904 .get_drvinfo = sky2_get_drvinfo,
3905 .get_wol = sky2_get_wol,
3906 .set_wol = sky2_set_wol,
3907 .get_msglevel = sky2_get_msglevel,
3908 .set_msglevel = sky2_set_msglevel,
3909 .nway_reset = sky2_nway_reset,
3910 .get_regs_len = sky2_get_regs_len,
3911 .get_regs = sky2_get_regs,
3912 .get_link = ethtool_op_get_link,
3913 .get_eeprom_len = sky2_get_eeprom_len,
3914 .get_eeprom = sky2_get_eeprom,
3915 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003916 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003917 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003918 .set_tso = sky2_set_tso,
3919 .get_rx_csum = sky2_get_rx_csum,
3920 .set_rx_csum = sky2_set_rx_csum,
3921 .get_strings = sky2_get_strings,
3922 .get_coalesce = sky2_get_coalesce,
3923 .set_coalesce = sky2_set_coalesce,
3924 .get_ringparam = sky2_get_ringparam,
3925 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003926 .get_pauseparam = sky2_get_pauseparam,
3927 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003928 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003929 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003930 .get_ethtool_stats = sky2_get_ethtool_stats,
3931};
3932
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003933#ifdef CONFIG_SKY2_DEBUG
3934
3935static struct dentry *sky2_debug;
3936
3937static int sky2_debug_show(struct seq_file *seq, void *v)
3938{
3939 struct net_device *dev = seq->private;
3940 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003941 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003942 unsigned port = sky2->port;
3943 unsigned idx, last;
3944 int sop;
3945
3946 if (!netif_running(dev))
3947 return -ENETDOWN;
3948
3949 seq_printf(seq, "IRQ src=%x mask=%x control=%x\n",
3950 sky2_read32(hw, B0_ISRC),
3951 sky2_read32(hw, B0_IMSK),
3952 sky2_read32(hw, B0_Y2_SP_ICR));
3953
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003954 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003955 last = sky2_read16(hw, STAT_PUT_IDX);
3956
3957 if (hw->st_idx == last)
3958 seq_puts(seq, "Status ring (empty)\n");
3959 else {
3960 seq_puts(seq, "Status ring\n");
3961 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
3962 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
3963 const struct sky2_status_le *le = hw->st_le + idx;
3964 seq_printf(seq, "[%d] %#x %d %#x\n",
3965 idx, le->opcode, le->length, le->status);
3966 }
3967 seq_puts(seq, "\n");
3968 }
3969
3970 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
3971 sky2->tx_cons, sky2->tx_prod,
3972 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
3973 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
3974
3975 /* Dump contents of tx ring */
3976 sop = 1;
3977 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < TX_RING_SIZE;
3978 idx = RING_NEXT(idx, TX_RING_SIZE)) {
3979 const struct sky2_tx_le *le = sky2->tx_le + idx;
3980 u32 a = le32_to_cpu(le->addr);
3981
3982 if (sop)
3983 seq_printf(seq, "%u:", idx);
3984 sop = 0;
3985
3986 switch(le->opcode & ~HW_OWNER) {
3987 case OP_ADDR64:
3988 seq_printf(seq, " %#x:", a);
3989 break;
3990 case OP_LRGLEN:
3991 seq_printf(seq, " mtu=%d", a);
3992 break;
3993 case OP_VLAN:
3994 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
3995 break;
3996 case OP_TCPLISW:
3997 seq_printf(seq, " csum=%#x", a);
3998 break;
3999 case OP_LARGESEND:
4000 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4001 break;
4002 case OP_PACKET:
4003 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4004 break;
4005 case OP_BUFFER:
4006 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4007 break;
4008 default:
4009 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4010 a, le16_to_cpu(le->length));
4011 }
4012
4013 if (le->ctrl & EOP) {
4014 seq_putc(seq, '\n');
4015 sop = 1;
4016 }
4017 }
4018
4019 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4020 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
4021 last = sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
4022 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4023
David S. Millerd1d08d12008-01-07 20:53:33 -08004024 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004025 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004026 return 0;
4027}
4028
4029static int sky2_debug_open(struct inode *inode, struct file *file)
4030{
4031 return single_open(file, sky2_debug_show, inode->i_private);
4032}
4033
4034static const struct file_operations sky2_debug_fops = {
4035 .owner = THIS_MODULE,
4036 .open = sky2_debug_open,
4037 .read = seq_read,
4038 .llseek = seq_lseek,
4039 .release = single_release,
4040};
4041
4042/*
4043 * Use network device events to create/remove/rename
4044 * debugfs file entries
4045 */
4046static int sky2_device_event(struct notifier_block *unused,
4047 unsigned long event, void *ptr)
4048{
4049 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004050 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004051
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004052 if (dev->open != sky2_up || !sky2_debug)
4053 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004054
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004055 switch(event) {
4056 case NETDEV_CHANGENAME:
4057 if (sky2->debugfs) {
4058 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4059 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004060 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004061 break;
4062
4063 case NETDEV_GOING_DOWN:
4064 if (sky2->debugfs) {
4065 printk(KERN_DEBUG PFX "%s: remove debugfs\n",
4066 dev->name);
4067 debugfs_remove(sky2->debugfs);
4068 sky2->debugfs = NULL;
4069 }
4070 break;
4071
4072 case NETDEV_UP:
4073 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4074 sky2_debug, dev,
4075 &sky2_debug_fops);
4076 if (IS_ERR(sky2->debugfs))
4077 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004078 }
4079
4080 return NOTIFY_DONE;
4081}
4082
4083static struct notifier_block sky2_notifier = {
4084 .notifier_call = sky2_device_event,
4085};
4086
4087
4088static __init void sky2_debug_init(void)
4089{
4090 struct dentry *ent;
4091
4092 ent = debugfs_create_dir("sky2", NULL);
4093 if (!ent || IS_ERR(ent))
4094 return;
4095
4096 sky2_debug = ent;
4097 register_netdevice_notifier(&sky2_notifier);
4098}
4099
4100static __exit void sky2_debug_cleanup(void)
4101{
4102 if (sky2_debug) {
4103 unregister_netdevice_notifier(&sky2_notifier);
4104 debugfs_remove(sky2_debug);
4105 sky2_debug = NULL;
4106 }
4107}
4108
4109#else
4110#define sky2_debug_init()
4111#define sky2_debug_cleanup()
4112#endif
4113
4114
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004115/* Initialize network device */
4116static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004117 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004118 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004119{
4120 struct sky2_port *sky2;
4121 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4122
4123 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004124 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004125 return NULL;
4126 }
4127
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004128 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004129 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004130 dev->open = sky2_up;
4131 dev->stop = sky2_down;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004132 dev->do_ioctl = sky2_ioctl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004133 dev->hard_start_xmit = sky2_xmit_frame;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004134 dev->set_multicast_list = sky2_set_multicast;
4135 dev->set_mac_address = sky2_set_mac_address;
4136 dev->change_mtu = sky2_change_mtu;
4137 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
4138 dev->tx_timeout = sky2_tx_timeout;
4139 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004140#ifdef CONFIG_NET_POLL_CONTROLLER
Stephen Hemmingera5e68c02007-11-06 11:45:40 -08004141 if (port == 0)
4142 dev->poll_controller = sky2_netpoll;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004143#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004144
4145 sky2 = netdev_priv(dev);
4146 sky2->netdev = dev;
4147 sky2->hw = hw;
4148 sky2->msg_enable = netif_msg_init(debug, default_msg);
4149
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004150 /* Auto speed and flow control */
4151 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004152 sky2->flow_mode = FC_BOTH;
4153
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004154 sky2->duplex = -1;
4155 sky2->speed = -1;
4156 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemminger8b31cfb2007-11-21 14:55:26 -08004157 sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004158 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004159
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004160 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004161 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004162 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004163
4164 hw->dev[port] = dev;
4165
4166 sky2->port = port;
4167
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004168 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004169 if (highmem)
4170 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004171
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004172#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004173 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4174 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4175 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4176 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4177 dev->vlan_rx_register = sky2_vlan_rx_register;
4178 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004179#endif
4180
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004181 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004182 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004183 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004184
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004185 return dev;
4186}
4187
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004188static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004189{
4190 const struct sky2_port *sky2 = netdev_priv(dev);
Joe Perches0795af52007-10-03 17:59:30 -07004191 DECLARE_MAC_BUF(mac);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004192
4193 if (netif_msg_probe(sky2))
Joe Perches0795af52007-10-03 17:59:30 -07004194 printk(KERN_INFO PFX "%s: addr %s\n",
4195 dev->name, print_mac(mac, dev->dev_addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004196}
4197
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004198/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004199static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004200{
4201 struct sky2_hw *hw = dev_id;
4202 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4203
4204 if (status == 0)
4205 return IRQ_NONE;
4206
4207 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004208 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004209 wake_up(&hw->msi_wait);
4210 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4211 }
4212 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4213
4214 return IRQ_HANDLED;
4215}
4216
4217/* Test interrupt path by forcing a a software IRQ */
4218static int __devinit sky2_test_msi(struct sky2_hw *hw)
4219{
4220 struct pci_dev *pdev = hw->pdev;
4221 int err;
4222
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004223 init_waitqueue_head (&hw->msi_wait);
4224
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004225 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4226
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004227 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004228 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004229 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004230 return err;
4231 }
4232
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004233 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004234 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004235
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004236 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004237
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004238 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004239 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004240 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4241 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004242
4243 err = -EOPNOTSUPP;
4244 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4245 }
4246
4247 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004248 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004249
4250 free_irq(pdev->irq, hw);
4251
4252 return err;
4253}
4254
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004255static int __devinit pci_wake_enabled(struct pci_dev *dev)
4256{
4257 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
4258 u16 value;
4259
4260 if (!pm)
4261 return 0;
4262 if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
4263 return 0;
4264 return value & PCI_PM_CTRL_PME_ENABLE;
4265}
4266
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004267/* This driver supports yukon2 chipset only */
4268static const char *sky2_name(u8 chipid, char *buf, int sz)
4269{
4270 const char *name[] = {
4271 "XL", /* 0xb3 */
4272 "EC Ultra", /* 0xb4 */
4273 "Extreme", /* 0xb5 */
4274 "EC", /* 0xb6 */
4275 "FE", /* 0xb7 */
4276 "FE+", /* 0xb8 */
4277 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004278 "UL 2", /* 0xba */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004279 };
4280
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004281 if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004282 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4283 else
4284 snprintf(buf, sz, "(chip %#x)", chipid);
4285 return buf;
4286}
4287
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004288static int __devinit sky2_probe(struct pci_dev *pdev,
4289 const struct pci_device_id *ent)
4290{
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004291 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004292 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004293 int err, using_dac = 0, wol_default;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004294 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004295
Stephen Hemminger793b8832005-09-14 16:06:14 -07004296 err = pci_enable_device(pdev);
4297 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004298 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004299 goto err_out;
4300 }
4301
Stephen Hemminger793b8832005-09-14 16:06:14 -07004302 err = pci_request_regions(pdev, DRV_NAME);
4303 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004304 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004305 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004306 }
4307
4308 pci_set_master(pdev);
4309
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004310 if (sizeof(dma_addr_t) > sizeof(u32) &&
4311 !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
4312 using_dac = 1;
4313 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4314 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004315 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4316 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004317 goto err_out_free_regions;
4318 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004319 } else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004320 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4321 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004322 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004323 goto err_out_free_regions;
4324 }
4325 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004326
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004327 wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
4328
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004329 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08004330 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004331 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004332 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004333 goto err_out_free_regions;
4334 }
4335
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004336 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004337
4338 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4339 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004340 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004341 goto err_out_free_hw;
4342 }
4343
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004344#ifdef __BIG_ENDIAN
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004345 /* The sk98lin vendor driver uses hardware byte swapping but
4346 * this driver uses software swapping.
4347 */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004348 {
4349 u32 reg;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004350 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004351 reg &= ~PCI_REV_DESC;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004352 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004353 }
4354#endif
4355
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004356 /* ring for status responses */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004357 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004358 if (!hw->st_le)
4359 goto err_out_iounmap;
4360
Stephen Hemmingere3173832007-02-06 10:45:39 -08004361 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004362 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004363 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004364
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004365 dev_info(&pdev->dev, "v%s addr 0x%llx irq %d Yukon-2 %s rev %d\n",
4366 DRV_VERSION, (unsigned long long)pci_resource_start(pdev, 0),
4367 pdev->irq, sky2_name(hw->chip_id, buf1, sizeof(buf1)),
4368 hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004369
Stephen Hemmingere3173832007-02-06 10:45:39 -08004370 sky2_reset(hw);
4371
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004372 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004373 if (!dev) {
4374 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004375 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004376 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004377
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004378 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4379 err = sky2_test_msi(hw);
4380 if (err == -EOPNOTSUPP)
4381 pci_disable_msi(pdev);
4382 else if (err)
4383 goto err_out_free_netdev;
4384 }
4385
Stephen Hemminger793b8832005-09-14 16:06:14 -07004386 err = register_netdev(dev);
4387 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004388 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004389 goto err_out_free_netdev;
4390 }
4391
Stephen Hemminger6de16232007-10-17 13:26:42 -07004392 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4393
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004394 err = request_irq(pdev->irq, sky2_intr,
4395 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004396 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004397 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004398 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004399 goto err_out_unregister;
4400 }
4401 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004402 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004403
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004404 sky2_show_addr(dev);
4405
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004406 if (hw->ports > 1) {
4407 struct net_device *dev1;
4408
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004409 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004410 if (!dev1)
4411 dev_warn(&pdev->dev, "allocation for second device failed\n");
4412 else if ((err = register_netdev(dev1))) {
4413 dev_warn(&pdev->dev,
4414 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004415 hw->dev[1] = NULL;
4416 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004417 } else
4418 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004419 }
4420
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004421 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004422 INIT_WORK(&hw->restart_work, sky2_restart);
4423
Stephen Hemminger793b8832005-09-14 16:06:14 -07004424 pci_set_drvdata(pdev, hw);
4425
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004426 return 0;
4427
Stephen Hemminger793b8832005-09-14 16:06:14 -07004428err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004429 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004430 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004431 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004432err_out_free_netdev:
4433 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004434err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004435 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004436 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004437err_out_iounmap:
4438 iounmap(hw->regs);
4439err_out_free_hw:
4440 kfree(hw);
4441err_out_free_regions:
4442 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004443err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004444 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004445err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004446 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004447 return err;
4448}
4449
4450static void __devexit sky2_remove(struct pci_dev *pdev)
4451{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004452 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004453 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004454
Stephen Hemminger793b8832005-09-14 16:06:14 -07004455 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004456 return;
4457
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004458 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004459 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004460
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004461 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004462 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004463
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004464 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004465
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004466 sky2_power_aux(hw);
4467
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004468 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004469 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004470 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004471
4472 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004473 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004474 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004475 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004476 pci_release_regions(pdev);
4477 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004478
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004479 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004480 free_netdev(hw->dev[i]);
4481
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004482 iounmap(hw->regs);
4483 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004484
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004485 pci_set_drvdata(pdev, NULL);
4486}
4487
4488#ifdef CONFIG_PM
4489static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4490{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004491 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004492 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004493
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004494 if (!hw)
4495 return 0;
4496
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004497 del_timer_sync(&hw->watchdog_timer);
4498 cancel_work_sync(&hw->restart_work);
4499
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004500 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004501 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004502 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004503
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004504 netif_device_detach(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004505 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004506 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004507
4508 if (sky2->wol)
4509 sky2_wol_init(sky2);
4510
4511 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004512 }
4513
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004514 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004515 napi_disable(&hw->napi);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004516 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004517
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004518 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004519 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingera068c0a2008-05-14 17:04:17 -07004520 sky2_power_state(hw, pci_choose_state(pdev, state));
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004521
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004522 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004523}
4524
4525static int sky2_resume(struct pci_dev *pdev)
4526{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004527 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004528 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004529
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004530 if (!hw)
4531 return 0;
4532
Stephen Hemmingera068c0a2008-05-14 17:04:17 -07004533 sky2_power_state(hw, PCI_D0);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004534
4535 err = pci_restore_state(pdev);
4536 if (err)
4537 goto out;
4538
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004539 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004540
4541 /* Re-enable all clocks */
Stephen Hemminger05745c42007-09-19 15:36:45 -07004542 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4543 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4544 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004545 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004546
Stephen Hemmingere3173832007-02-06 10:45:39 -08004547 sky2_reset(hw);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004548 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004549 napi_enable(&hw->napi);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004550
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004551 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004552 struct net_device *dev = hw->dev[i];
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004553
4554 netif_device_attach(dev);
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004555 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004556 err = sky2_up(dev);
4557 if (err) {
4558 printk(KERN_ERR PFX "%s: could not up: %d\n",
4559 dev->name, err);
Ben Hutchings68c28892008-05-31 16:52:52 +01004560 rtnl_lock();
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004561 dev_close(dev);
Ben Hutchings68c28892008-05-31 16:52:52 +01004562 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004563 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004564 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004565 }
4566 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004567
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004568 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004569out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004570 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004571 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004572 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004573}
4574#endif
4575
Stephen Hemmingere3173832007-02-06 10:45:39 -08004576static void sky2_shutdown(struct pci_dev *pdev)
4577{
4578 struct sky2_hw *hw = pci_get_drvdata(pdev);
4579 int i, wol = 0;
4580
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004581 if (!hw)
4582 return;
4583
Stephen Hemminger5c0d6b32007-10-14 13:25:22 -07004584 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004585
4586 for (i = 0; i < hw->ports; i++) {
4587 struct net_device *dev = hw->dev[i];
4588 struct sky2_port *sky2 = netdev_priv(dev);
4589
4590 if (sky2->wol) {
4591 wol = 1;
4592 sky2_wol_init(sky2);
4593 }
4594 }
4595
4596 if (wol)
4597 sky2_power_aux(hw);
4598
4599 pci_enable_wake(pdev, PCI_D3hot, wol);
4600 pci_enable_wake(pdev, PCI_D3cold, wol);
4601
4602 pci_disable_device(pdev);
Stephen Hemmingera068c0a2008-05-14 17:04:17 -07004603 sky2_power_state(hw, PCI_D3hot);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004604}
4605
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004606static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004607 .name = DRV_NAME,
4608 .id_table = sky2_id_table,
4609 .probe = sky2_probe,
4610 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004611#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004612 .suspend = sky2_suspend,
4613 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004614#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004615 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004616};
4617
4618static int __init sky2_init_module(void)
4619{
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004620 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004621 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004622}
4623
4624static void __exit sky2_cleanup_module(void)
4625{
4626 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004627 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004628}
4629
4630module_init(sky2_init_module);
4631module_exit(sky2_cleanup_module);
4632
4633MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe6342007-01-23 11:38:57 -08004634MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004635MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004636MODULE_VERSION(DRV_VERSION);