blob: 25213d521bc2ddc9d2beaa916f48f5a2d66ee03a [file] [log] [blame]
Sujithfb9987d2010-03-17 14:25:25 +05301/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2010-2011 Atheros Communications Inc.
Sujithfb9987d2010-03-17 14:25:25 +05303 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Joe Perches516304b2012-03-18 17:30:52 -070017#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
Sujithfb9987d2010-03-17 14:25:25 +053019#include "htc.h"
20
21MODULE_AUTHOR("Atheros Communications");
22MODULE_LICENSE("Dual BSD/GPL");
23MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
24
25static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
26module_param_named(debug, ath9k_debug, uint, 0);
27MODULE_PARM_DESC(debug, "Debugging mask");
28
Sujithe1572c52010-03-24 13:42:13 +053029int htc_modparam_nohwcrypt;
30module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
Sujithfb9987d2010-03-17 14:25:25 +053031MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
32
33#define CHAN2G(_freq, _idx) { \
34 .center_freq = (_freq), \
35 .hw_value = (_idx), \
36 .max_power = 20, \
37}
38
Sujithea46e642010-06-02 15:53:50 +053039#define CHAN5G(_freq, _idx) { \
40 .band = IEEE80211_BAND_5GHZ, \
41 .center_freq = (_freq), \
42 .hw_value = (_idx), \
43 .max_power = 20, \
44}
45
Sujithfb9987d2010-03-17 14:25:25 +053046static struct ieee80211_channel ath9k_2ghz_channels[] = {
47 CHAN2G(2412, 0), /* Channel 1 */
48 CHAN2G(2417, 1), /* Channel 2 */
49 CHAN2G(2422, 2), /* Channel 3 */
50 CHAN2G(2427, 3), /* Channel 4 */
51 CHAN2G(2432, 4), /* Channel 5 */
52 CHAN2G(2437, 5), /* Channel 6 */
53 CHAN2G(2442, 6), /* Channel 7 */
54 CHAN2G(2447, 7), /* Channel 8 */
55 CHAN2G(2452, 8), /* Channel 9 */
56 CHAN2G(2457, 9), /* Channel 10 */
57 CHAN2G(2462, 10), /* Channel 11 */
58 CHAN2G(2467, 11), /* Channel 12 */
59 CHAN2G(2472, 12), /* Channel 13 */
60 CHAN2G(2484, 13), /* Channel 14 */
61};
62
Sujithea46e642010-06-02 15:53:50 +053063static struct ieee80211_channel ath9k_5ghz_channels[] = {
64 /* _We_ call this UNII 1 */
65 CHAN5G(5180, 14), /* Channel 36 */
66 CHAN5G(5200, 15), /* Channel 40 */
67 CHAN5G(5220, 16), /* Channel 44 */
68 CHAN5G(5240, 17), /* Channel 48 */
69 /* _We_ call this UNII 2 */
70 CHAN5G(5260, 18), /* Channel 52 */
71 CHAN5G(5280, 19), /* Channel 56 */
72 CHAN5G(5300, 20), /* Channel 60 */
73 CHAN5G(5320, 21), /* Channel 64 */
74 /* _We_ call this "Middle band" */
75 CHAN5G(5500, 22), /* Channel 100 */
76 CHAN5G(5520, 23), /* Channel 104 */
77 CHAN5G(5540, 24), /* Channel 108 */
78 CHAN5G(5560, 25), /* Channel 112 */
79 CHAN5G(5580, 26), /* Channel 116 */
80 CHAN5G(5600, 27), /* Channel 120 */
81 CHAN5G(5620, 28), /* Channel 124 */
82 CHAN5G(5640, 29), /* Channel 128 */
83 CHAN5G(5660, 30), /* Channel 132 */
84 CHAN5G(5680, 31), /* Channel 136 */
85 CHAN5G(5700, 32), /* Channel 140 */
86 /* _We_ call this UNII 3 */
87 CHAN5G(5745, 33), /* Channel 149 */
88 CHAN5G(5765, 34), /* Channel 153 */
89 CHAN5G(5785, 35), /* Channel 157 */
90 CHAN5G(5805, 36), /* Channel 161 */
91 CHAN5G(5825, 37), /* Channel 165 */
92};
93
Sujithfb9987d2010-03-17 14:25:25 +053094/* Atheros hardware rate code addition for short premble */
95#define SHPCHECK(__hw_rate, __flags) \
96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
97
98#define RATE(_bitrate, _hw_rate, _flags) { \
99 .bitrate = (_bitrate), \
100 .flags = (_flags), \
101 .hw_value = (_hw_rate), \
102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
103}
104
105static struct ieee80211_rate ath9k_legacy_rates[] = {
106 RATE(10, 0x1b, 0),
107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
110 RATE(60, 0x0b, 0),
111 RATE(90, 0x0f, 0),
112 RATE(120, 0x0a, 0),
113 RATE(180, 0x0e, 0),
114 RATE(240, 0x09, 0),
115 RATE(360, 0x0d, 0),
116 RATE(480, 0x08, 0),
117 RATE(540, 0x0c, 0),
118};
119
Sujith Manoharand244f212011-04-28 16:14:05 +0530120#ifdef CONFIG_MAC80211_LEDS
121static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
122 { .throughput = 0 * 1024, .blink_time = 334 },
123 { .throughput = 1 * 1024, .blink_time = 260 },
124 { .throughput = 5 * 1024, .blink_time = 220 },
125 { .throughput = 10 * 1024, .blink_time = 190 },
126 { .throughput = 20 * 1024, .blink_time = 170 },
127 { .throughput = 50 * 1024, .blink_time = 150 },
128 { .throughput = 70 * 1024, .blink_time = 130 },
129 { .throughput = 100 * 1024, .blink_time = 110 },
130 { .throughput = 200 * 1024, .blink_time = 80 },
131 { .throughput = 300 * 1024, .blink_time = 50 },
132};
133#endif
134
Sujithfb9987d2010-03-17 14:25:25 +0530135static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
136{
137 int time_left;
138
Sujith.Manoharan@atheros.comd8c49ff2010-05-11 16:24:43 +0530139 if (atomic_read(&priv->htc->tgt_ready) > 0) {
140 atomic_dec(&priv->htc->tgt_ready);
141 return 0;
142 }
143
Sujithfb9987d2010-03-17 14:25:25 +0530144 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
145 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
146 if (!time_left) {
147 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
148 return -ETIMEDOUT;
149 }
150
Sujith.Manoharan@atheros.comd8c49ff2010-05-11 16:24:43 +0530151 atomic_dec(&priv->htc->tgt_ready);
152
Sujithfb9987d2010-03-17 14:25:25 +0530153 return 0;
154}
155
156static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
157{
Sujithfb9987d2010-03-17 14:25:25 +0530158 ath9k_hw_deinit(priv->ah);
Sujithfb9987d2010-03-17 14:25:25 +0530159 kfree(priv->ah);
160 priv->ah = NULL;
161}
162
163static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
164{
165 struct ieee80211_hw *hw = priv->hw;
166
167 wiphy_rfkill_stop_polling(hw->wiphy);
168 ath9k_deinit_leds(priv);
169 ieee80211_unregister_hw(hw);
170 ath9k_rx_cleanup(priv);
171 ath9k_tx_cleanup(priv);
172 ath9k_deinit_priv(priv);
173}
174
175static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
176 u16 service_id,
177 void (*tx) (void *,
178 struct sk_buff *,
179 enum htc_endpoint_id,
180 bool txok),
181 enum htc_endpoint_id *ep_id)
182{
183 struct htc_service_connreq req;
184
185 memset(&req, 0, sizeof(struct htc_service_connreq));
186
187 req.service_id = service_id;
188 req.ep_callbacks.priv = priv;
189 req.ep_callbacks.rx = ath9k_htc_rxep;
190 req.ep_callbacks.tx = tx;
191
192 return htc_connect_service(priv->htc, &req, ep_id);
193}
194
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530195static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
196 u32 drv_info)
Sujithfb9987d2010-03-17 14:25:25 +0530197{
198 int ret;
199
200 /* WMI CMD*/
201 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
202 if (ret)
203 goto err;
204
205 /* Beacon */
Sujith9c6dda42010-05-06 14:45:47 +0530206 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
Sujithfb9987d2010-03-17 14:25:25 +0530207 &priv->beacon_ep);
208 if (ret)
209 goto err;
210
211 /* CAB */
212 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
213 &priv->cab_ep);
214 if (ret)
215 goto err;
216
217
218 /* UAPSD */
219 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
220 &priv->uapsd_ep);
221 if (ret)
222 goto err;
223
224 /* MGMT */
225 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
226 &priv->mgmt_ep);
227 if (ret)
228 goto err;
229
230 /* DATA BE */
231 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
232 &priv->data_be_ep);
233 if (ret)
234 goto err;
235
236 /* DATA BK */
237 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
238 &priv->data_bk_ep);
239 if (ret)
240 goto err;
241
242 /* DATA VI */
243 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
244 &priv->data_vi_ep);
245 if (ret)
246 goto err;
247
248 /* DATA VO */
249 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
250 &priv->data_vo_ep);
251 if (ret)
252 goto err;
253
Sujith6267dc72010-06-02 15:53:54 +0530254 /*
255 * Setup required credits before initializing HTC.
256 * This is a bit hacky, but, since queuing is done in
257 * the HIF layer, shouldn't matter much.
258 */
259
Sujith Manoharan0b5ead92010-12-07 16:31:38 +0530260 if (IS_AR7010_DEVICE(drv_info))
Sujith Manoharand108e8b2011-05-17 12:42:24 +0530261 priv->htc->credits = 45;
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530262 else
Sujith4e63f762010-06-17 10:29:01 +0530263 priv->htc->credits = 33;
Sujith6267dc72010-06-02 15:53:54 +0530264
Sujithfb9987d2010-03-17 14:25:25 +0530265 ret = htc_init(priv->htc);
266 if (ret)
267 goto err;
268
Sujith6267dc72010-06-02 15:53:54 +0530269 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
270 priv->htc->credits);
271
Sujithfb9987d2010-03-17 14:25:25 +0530272 return 0;
273
274err:
275 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
276 return ret;
277}
278
279static int ath9k_reg_notifier(struct wiphy *wiphy,
280 struct regulatory_request *request)
281{
282 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
283 struct ath9k_htc_priv *priv = hw->priv;
284
285 return ath_reg_notifier_apply(wiphy, request,
286 ath9k_hw_regulatory(priv->ah));
287}
288
Sujith4a22fe12010-04-16 11:53:53 +0530289static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
Sujithfb9987d2010-03-17 14:25:25 +0530290{
291 struct ath_hw *ah = (struct ath_hw *) hw_priv;
292 struct ath_common *common = ath9k_hw_common(ah);
293 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
294 __be32 val, reg = cpu_to_be32(reg_offset);
295 int r;
296
297 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
298 (u8 *) &reg, sizeof(reg),
299 (u8 *) &val, sizeof(val),
300 100);
301 if (unlikely(r)) {
Joe Perchesd2182b62011-12-15 14:55:53 -0800302 ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
Joe Perches226afe62010-12-02 19:12:37 -0800303 reg_offset, r);
Sujithfb9987d2010-03-17 14:25:25 +0530304 return -EIO;
305 }
306
307 return be32_to_cpu(val);
308}
309
Sujith Manoharan09a525d2011-01-04 13:17:18 +0530310static void ath9k_multi_regread(void *hw_priv, u32 *addr,
311 u32 *val, u16 count)
312{
313 struct ath_hw *ah = (struct ath_hw *) hw_priv;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
316 __be32 tmpaddr[8];
317 __be32 tmpval[8];
318 int i, ret;
319
320 for (i = 0; i < count; i++) {
321 tmpaddr[i] = cpu_to_be32(addr[i]);
322 }
323
324 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
325 (u8 *)tmpaddr , sizeof(u32) * count,
326 (u8 *)tmpval, sizeof(u32) * count,
327 100);
328 if (unlikely(ret)) {
Joe Perchesd2182b62011-12-15 14:55:53 -0800329 ath_dbg(common, WMI,
Sujith Manoharan09a525d2011-01-04 13:17:18 +0530330 "Multiple REGISTER READ FAILED (count: %d)\n", count);
331 }
332
333 for (i = 0; i < count; i++) {
334 val[i] = be32_to_cpu(tmpval[i]);
335 }
336}
337
Sujith4a22fe12010-04-16 11:53:53 +0530338static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
Sujithfb9987d2010-03-17 14:25:25 +0530339{
340 struct ath_hw *ah = (struct ath_hw *) hw_priv;
341 struct ath_common *common = ath9k_hw_common(ah);
342 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
Joe Perches07b2fa52010-11-20 18:38:53 -0800343 const __be32 buf[2] = {
Sujithfb9987d2010-03-17 14:25:25 +0530344 cpu_to_be32(reg_offset),
345 cpu_to_be32(val),
346 };
347 int r;
348
349 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
350 (u8 *) &buf, sizeof(buf),
351 (u8 *) &val, sizeof(val),
352 100);
353 if (unlikely(r)) {
Joe Perchesd2182b62011-12-15 14:55:53 -0800354 ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
Joe Perches226afe62010-12-02 19:12:37 -0800355 reg_offset, r);
Sujithfb9987d2010-03-17 14:25:25 +0530356 }
357}
358
Sujith4a22fe12010-04-16 11:53:53 +0530359static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
360{
361 struct ath_hw *ah = (struct ath_hw *) hw_priv;
362 struct ath_common *common = ath9k_hw_common(ah);
363 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
364 u32 rsp_status;
365 int r;
366
367 mutex_lock(&priv->wmi->multi_write_mutex);
368
369 /* Store the register/value */
370 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
371 cpu_to_be32(reg_offset);
372 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
373 cpu_to_be32(val);
374
375 priv->wmi->multi_write_idx++;
376
377 /* If the buffer is full, send it out. */
378 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
379 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
380 (u8 *) &priv->wmi->multi_write,
381 sizeof(struct register_write) * priv->wmi->multi_write_idx,
382 (u8 *) &rsp_status, sizeof(rsp_status),
383 100);
384 if (unlikely(r)) {
Joe Perchesd2182b62011-12-15 14:55:53 -0800385 ath_dbg(common, WMI,
Joe Perches226afe62010-12-02 19:12:37 -0800386 "REGISTER WRITE FAILED, multi len: %d\n",
387 priv->wmi->multi_write_idx);
Sujith4a22fe12010-04-16 11:53:53 +0530388 }
389 priv->wmi->multi_write_idx = 0;
390 }
391
392 mutex_unlock(&priv->wmi->multi_write_mutex);
393}
394
395static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
396{
397 struct ath_hw *ah = (struct ath_hw *) hw_priv;
398 struct ath_common *common = ath9k_hw_common(ah);
399 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
400
401 if (atomic_read(&priv->wmi->mwrite_cnt))
402 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
403 else
404 ath9k_regwrite_single(hw_priv, val, reg_offset);
405}
406
407static void ath9k_enable_regwrite_buffer(void *hw_priv)
408{
409 struct ath_hw *ah = (struct ath_hw *) hw_priv;
410 struct ath_common *common = ath9k_hw_common(ah);
411 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
412
413 atomic_inc(&priv->wmi->mwrite_cnt);
414}
415
Sujith4a22fe12010-04-16 11:53:53 +0530416static void ath9k_regwrite_flush(void *hw_priv)
417{
418 struct ath_hw *ah = (struct ath_hw *) hw_priv;
419 struct ath_common *common = ath9k_hw_common(ah);
420 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
421 u32 rsp_status;
422 int r;
423
Felix Fietkau435c1612010-10-05 12:03:42 +0200424 atomic_dec(&priv->wmi->mwrite_cnt);
425
Sujith4a22fe12010-04-16 11:53:53 +0530426 mutex_lock(&priv->wmi->multi_write_mutex);
427
428 if (priv->wmi->multi_write_idx) {
429 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
430 (u8 *) &priv->wmi->multi_write,
431 sizeof(struct register_write) * priv->wmi->multi_write_idx,
432 (u8 *) &rsp_status, sizeof(rsp_status),
433 100);
434 if (unlikely(r)) {
Joe Perchesd2182b62011-12-15 14:55:53 -0800435 ath_dbg(common, WMI,
Joe Perches226afe62010-12-02 19:12:37 -0800436 "REGISTER WRITE FAILED, multi len: %d\n",
437 priv->wmi->multi_write_idx);
Sujith4a22fe12010-04-16 11:53:53 +0530438 }
439 priv->wmi->multi_write_idx = 0;
440 }
441
442 mutex_unlock(&priv->wmi->multi_write_mutex);
443}
444
Felix Fietkau845e03c2011-03-23 20:57:25 +0100445static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
446{
447 u32 val;
448
449 val = ath9k_regread(hw_priv, reg_offset);
450 val &= ~clr;
451 val |= set;
452 ath9k_regwrite(hw_priv, val, reg_offset);
453 return val;
454}
455
Sujithfb9987d2010-03-17 14:25:25 +0530456static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
457{
458 *csz = L1_CACHE_BYTES >> 2;
459}
460
461static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
462{
463 struct ath_hw *ah = (struct ath_hw *) common->ah;
464
465 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
466
467 if (!ath9k_hw_wait(ah,
468 AR_EEPROM_STATUS_DATA,
469 AR_EEPROM_STATUS_DATA_BUSY |
470 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
471 AH_WAIT_TIMEOUT))
472 return false;
473
474 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
475 AR_EEPROM_STATUS_DATA_VAL);
476
477 return true;
478}
479
480static const struct ath_bus_ops ath9k_usb_bus_ops = {
Sujith497ad9a2010-04-01 10:28:20 +0530481 .ath_bus_type = ATH_USB,
Sujithfb9987d2010-03-17 14:25:25 +0530482 .read_cachesize = ath_usb_read_cachesize,
483 .eeprom_read = ath_usb_eeprom_read,
484};
485
486static void setup_ht_cap(struct ath9k_htc_priv *priv,
487 struct ieee80211_sta_ht_cap *ht_info)
488{
Sujith6debeca2010-06-02 15:53:40 +0530489 struct ath_common *common = ath9k_hw_common(priv->ah);
490 u8 tx_streams, rx_streams;
491 int i;
492
Sujithfb9987d2010-03-17 14:25:25 +0530493 ht_info->ht_supported = true;
494 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
495 IEEE80211_HT_CAP_SM_PS |
496 IEEE80211_HT_CAP_SGI_40 |
497 IEEE80211_HT_CAP_DSSSCCK40;
498
Sujithb4dec5e2010-05-17 12:01:19 +0530499 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
500 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
501
Sujith17525f92010-05-17 12:01:21 +0530502 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
503
Sujithfb9987d2010-03-17 14:25:25 +0530504 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
505 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
506
507 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
Sujith6debeca2010-06-02 15:53:40 +0530508
509 /* ath9k_htc supports only 1 or 2 stream devices */
Felix Fietkau82b2d332011-09-03 01:40:23 +0200510 tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2);
511 rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2);
Sujith6debeca2010-06-02 15:53:40 +0530512
Joe Perchesd2182b62011-12-15 14:55:53 -0800513 ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n",
Joe Perches226afe62010-12-02 19:12:37 -0800514 tx_streams, rx_streams);
Sujith6debeca2010-06-02 15:53:40 +0530515
516 if (tx_streams != rx_streams) {
517 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
518 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
519 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
520 }
521
522 for (i = 0; i < rx_streams; i++)
523 ht_info->mcs.rx_mask[i] = 0xff;
524
Sujithfb9987d2010-03-17 14:25:25 +0530525 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
526}
527
528static int ath9k_init_queues(struct ath9k_htc_priv *priv)
529{
530 struct ath_common *common = ath9k_hw_common(priv->ah);
531 int i;
532
533 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
534 priv->hwq_map[i] = -1;
535
Sujithca74b832010-05-14 11:18:56 +0530536 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
537 if (priv->beaconq == -1) {
Joe Perches38002762010-12-02 19:12:36 -0800538 ath_err(common, "Unable to setup BEACON xmit queue\n");
Sujithca74b832010-05-14 11:18:56 +0530539 goto err;
540 }
541
542 priv->cabq = ath9k_htc_cabq_setup(priv);
543 if (priv->cabq == -1) {
Joe Perches38002762010-12-02 19:12:36 -0800544 ath_err(common, "Unable to setup CAB xmit queue\n");
Sujithca74b832010-05-14 11:18:56 +0530545 goto err;
546 }
547
Felix Fietkaue8c35a72010-06-12 00:33:50 -0400548 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
Joe Perches38002762010-12-02 19:12:36 -0800549 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
Sujithfb9987d2010-03-17 14:25:25 +0530550 goto err;
551 }
552
Felix Fietkaue8c35a72010-06-12 00:33:50 -0400553 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
Joe Perches38002762010-12-02 19:12:36 -0800554 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
Sujithfb9987d2010-03-17 14:25:25 +0530555 goto err;
556 }
Felix Fietkaue8c35a72010-06-12 00:33:50 -0400557 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
Joe Perches38002762010-12-02 19:12:36 -0800558 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
Sujithfb9987d2010-03-17 14:25:25 +0530559 goto err;
560 }
Felix Fietkaue8c35a72010-06-12 00:33:50 -0400561 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
Joe Perches38002762010-12-02 19:12:36 -0800562 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
Sujithfb9987d2010-03-17 14:25:25 +0530563 goto err;
564 }
565
566 return 0;
567
568err:
569 return -EINVAL;
570}
571
Sujithfb9987d2010-03-17 14:25:25 +0530572static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
573{
Felix Fietkaud4659912010-10-14 16:02:39 +0200574 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
Sujithfb9987d2010-03-17 14:25:25 +0530575 priv->sbands[IEEE80211_BAND_2GHZ].channels =
576 ath9k_2ghz_channels;
577 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
578 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
579 ARRAY_SIZE(ath9k_2ghz_channels);
580 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
581 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
582 ARRAY_SIZE(ath9k_legacy_rates);
583 }
Sujithea46e642010-06-02 15:53:50 +0530584
Felix Fietkaud4659912010-10-14 16:02:39 +0200585 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
Sujithea46e642010-06-02 15:53:50 +0530586 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
587 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
588 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
589 ARRAY_SIZE(ath9k_5ghz_channels);
590 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
591 ath9k_legacy_rates + 4;
592 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
593 ARRAY_SIZE(ath9k_legacy_rates) - 4;
594 }
Sujithfb9987d2010-03-17 14:25:25 +0530595}
596
597static void ath9k_init_misc(struct ath9k_htc_priv *priv)
598{
599 struct ath_common *common = ath9k_hw_common(priv->ah);
600
Felix Fietkau364734f2010-09-14 20:22:44 +0200601 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
Sujithfb9987d2010-03-17 14:25:25 +0530602
Sujith9f01a842010-03-29 16:07:20 +0530603 priv->ah->opmode = NL80211_IFTYPE_STATION;
Sujithfb9987d2010-03-17 14:25:25 +0530604}
605
Vivek Natarajan21cb9872010-08-18 19:57:49 +0530606static int ath9k_init_priv(struct ath9k_htc_priv *priv,
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530607 u16 devid, char *product,
608 u32 drv_info)
Sujithfb9987d2010-03-17 14:25:25 +0530609{
610 struct ath_hw *ah = NULL;
611 struct ath_common *common;
Sujith Manoharan832f6a12011-04-13 11:23:08 +0530612 int i, ret = 0, csz = 0;
Sujithfb9987d2010-03-17 14:25:25 +0530613
614 priv->op_flags |= OP_INVALID;
615
616 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
617 if (!ah)
618 return -ENOMEM;
619
620 ah->hw_version.devid = devid;
Sujith Manoharan0b5ead92010-12-07 16:31:38 +0530621 ah->hw_version.usbdev = drv_info;
Felix Fietkauf8afa422010-11-22 18:26:51 +0100622 ah->ah_flags |= AH_USE_EEPROM;
Felix Fietkauf9f84e92011-03-23 20:57:24 +0100623 ah->reg_ops.read = ath9k_regread;
624 ah->reg_ops.multi_read = ath9k_multi_regread;
625 ah->reg_ops.write = ath9k_regwrite;
626 ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
627 ah->reg_ops.write_flush = ath9k_regwrite_flush;
Felix Fietkau845e03c2011-03-23 20:57:25 +0100628 ah->reg_ops.rmw = ath9k_reg_rmw;
Sujithfb9987d2010-03-17 14:25:25 +0530629 priv->ah = ah;
630
631 common = ath9k_hw_common(ah);
Felix Fietkauf9f84e92011-03-23 20:57:24 +0100632 common->ops = &ah->reg_ops;
Sujithfb9987d2010-03-17 14:25:25 +0530633 common->bus_ops = &ath9k_usb_bus_ops;
634 common->ah = ah;
635 common->hw = priv->hw;
636 common->priv = priv;
637 common->debug_mask = ath9k_debug;
638
Sujithfb9987d2010-03-17 14:25:25 +0530639 spin_lock_init(&priv->beacon_lock);
Sujith Manoharan658ef042011-04-13 11:25:00 +0530640 spin_lock_init(&priv->tx.tx_lock);
Sujithfb9987d2010-03-17 14:25:25 +0530641 mutex_init(&priv->mutex);
Vivek Natarajanbde748a2010-04-05 14:48:05 +0530642 mutex_init(&priv->htc_pm_lock);
Sujithfb9987d2010-03-17 14:25:25 +0530643 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
644 (unsigned long)priv);
Sujith Manoharan27876a22011-04-13 11:26:18 +0530645 tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
Sujith Manoharan73908672010-12-28 14:28:27 +0530646 (unsigned long)priv);
Sujith Manoharana2362542011-02-21 07:49:38 +0530647 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
Vivek Natarajanbde748a2010-04-05 14:48:05 +0530648 INIT_WORK(&priv->ps_work, ath9k_ps_work);
Sujith Manoharan73908672010-12-28 14:28:27 +0530649 INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
Sujith Manoharan859c3ca2011-04-13 11:26:39 +0530650 setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
651 (unsigned long)priv);
Sujithfb9987d2010-03-17 14:25:25 +0530652
653 /*
654 * Cache line size is used to size and align various
655 * structures used to communicate with the hardware.
656 */
657 ath_read_cachesize(common, &csz);
658 common->cachelsz = csz << 2; /* convert to bytes */
659
660 ret = ath9k_hw_init(ah);
661 if (ret) {
Joe Perches38002762010-12-02 19:12:36 -0800662 ath_err(common,
663 "Unable to initialize hardware; initialization status: %d\n",
664 ret);
Sujithfb9987d2010-03-17 14:25:25 +0530665 goto err_hw;
666 }
667
Sujithfb9987d2010-03-17 14:25:25 +0530668 ret = ath9k_init_queues(priv);
669 if (ret)
670 goto err_queues;
671
Sujith Manoharan832f6a12011-04-13 11:23:08 +0530672 for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
673 priv->cur_beacon_conf.bslot[i] = NULL;
674
Rajkumar Manoharanf82b4bd2011-08-13 10:28:15 +0530675 ath9k_cmn_init_crypto(ah);
Sujithfb9987d2010-03-17 14:25:25 +0530676 ath9k_init_channels_rates(priv);
677 ath9k_init_misc(priv);
Sujith Manoharancee53412012-02-22 12:41:41 +0530678 ath9k_htc_init_btcoex(priv, product);
Vivek Natarajan21cb9872010-08-18 19:57:49 +0530679
Sujithfb9987d2010-03-17 14:25:25 +0530680 return 0;
681
682err_queues:
Sujithfb9987d2010-03-17 14:25:25 +0530683 ath9k_hw_deinit(ah);
684err_hw:
685
686 kfree(ah);
687 priv->ah = NULL;
688
689 return ret;
690}
691
692static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
693 struct ieee80211_hw *hw)
694{
695 struct ath_common *common = ath9k_hw_common(priv->ah);
696
697 hw->flags = IEEE80211_HW_SIGNAL_DBM |
698 IEEE80211_HW_AMPDU_AGGREGATION |
699 IEEE80211_HW_SPECTRUM_MGMT |
Sujith32fbcca2010-03-30 08:48:27 +0530700 IEEE80211_HW_HAS_RATE_CONTROL |
Vivek Natarajanbde748a2010-04-05 14:48:05 +0530701 IEEE80211_HW_RX_INCLUDES_FCS |
702 IEEE80211_HW_SUPPORTS_PS |
Sujith Manoharan7d547eb2011-04-13 11:23:34 +0530703 IEEE80211_HW_PS_NULLFUNC_STACK |
Rajkumar Manoharan8ae2e122011-07-08 18:12:03 +0530704 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
Sujith Manoharan7d547eb2011-04-13 11:23:34 +0530705 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
Sujithfb9987d2010-03-17 14:25:25 +0530706
707 hw->wiphy->interface_modes =
708 BIT(NL80211_IFTYPE_STATION) |
Sujith Manoharan09d5b942011-04-13 11:27:06 +0530709 BIT(NL80211_IFTYPE_ADHOC) |
710 BIT(NL80211_IFTYPE_AP) |
711 BIT(NL80211_IFTYPE_P2P_GO) |
712 BIT(NL80211_IFTYPE_P2P_CLIENT);
Sujithfb9987d2010-03-17 14:25:25 +0530713
Vivek Natarajanbde748a2010-04-05 14:48:05 +0530714 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
715
Johannes Berg81ddbb52012-03-26 18:47:18 +0200716 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
717 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
Antonio Quartullid7d312c2012-01-17 23:13:30 +0100718
Sujithfb9987d2010-03-17 14:25:25 +0530719 hw->queues = 4;
720 hw->channel_change_time = 5000;
721 hw->max_listen_interval = 10;
Sujith Manoharan3a0593e2011-04-20 14:33:28 +0530722
Sujithfb9987d2010-03-17 14:25:25 +0530723 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
724 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
725
726 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
727 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
728 sizeof(struct htc_frame_hdr) + 4;
729
Felix Fietkaud4659912010-10-14 16:02:39 +0200730 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
Sujithfb9987d2010-03-17 14:25:25 +0530731 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
732 &priv->sbands[IEEE80211_BAND_2GHZ];
Felix Fietkaud4659912010-10-14 16:02:39 +0200733 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
Sujithea46e642010-06-02 15:53:50 +0530734 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
735 &priv->sbands[IEEE80211_BAND_5GHZ];
Sujithfb9987d2010-03-17 14:25:25 +0530736
737 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Felix Fietkaud4659912010-10-14 16:02:39 +0200738 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
Sujithfb9987d2010-03-17 14:25:25 +0530739 setup_ht_cap(priv,
740 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
Felix Fietkaud4659912010-10-14 16:02:39 +0200741 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
Sujithea46e642010-06-02 15:53:50 +0530742 setup_ht_cap(priv,
743 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
Sujithfb9987d2010-03-17 14:25:25 +0530744 }
745
746 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
747}
748
Sujith Manoharan29bbfb22011-04-13 11:22:51 +0530749static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
750{
751 struct ieee80211_hw *hw = priv->hw;
752 struct wmi_fw_version cmd_rsp;
753 int ret;
754
755 memset(&cmd_rsp, 0, sizeof(cmd_rsp));
756
757 WMI_CMD(WMI_GET_FW_VERSION);
758 if (ret)
759 return -EINVAL;
760
761 priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
762 priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
763
764 snprintf(hw->wiphy->fw_version, ETHTOOL_BUSINFO_LEN, "%d.%d",
765 priv->fw_version_major,
766 priv->fw_version_minor);
767
768 dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
769 priv->fw_version_major,
770 priv->fw_version_minor);
771
Sujith Manoharan3a0593e2011-04-20 14:33:28 +0530772 /*
773 * Check if the available FW matches the driver's
774 * required version.
775 */
776 if (priv->fw_version_major != MAJOR_VERSION_REQ ||
777 priv->fw_version_minor != MINOR_VERSION_REQ) {
778 dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
779 MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
780 return -EINVAL;
781 }
782
Sujith Manoharan29bbfb22011-04-13 11:22:51 +0530783 return 0;
784}
785
Vivek Natarajan21cb9872010-08-18 19:57:49 +0530786static int ath9k_init_device(struct ath9k_htc_priv *priv,
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530787 u16 devid, char *product, u32 drv_info)
Sujithfb9987d2010-03-17 14:25:25 +0530788{
789 struct ieee80211_hw *hw = priv->hw;
790 struct ath_common *common;
791 struct ath_hw *ah;
792 int error = 0;
793 struct ath_regulatory *reg;
Sujith Manoharan3e3f1d12011-02-21 07:50:30 +0530794 char hw_name[64];
Sujithfb9987d2010-03-17 14:25:25 +0530795
796 /* Bring up device */
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530797 error = ath9k_init_priv(priv, devid, product, drv_info);
Sujithfb9987d2010-03-17 14:25:25 +0530798 if (error != 0)
799 goto err_init;
800
801 ah = priv->ah;
802 common = ath9k_hw_common(ah);
803 ath9k_set_hw_capab(priv, hw);
804
Sujith Manoharan29bbfb22011-04-13 11:22:51 +0530805 error = ath9k_init_firmware_version(priv);
806 if (error != 0)
807 goto err_fw;
808
Sujithfb9987d2010-03-17 14:25:25 +0530809 /* Initialize regulatory */
810 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
811 ath9k_reg_notifier);
812 if (error)
813 goto err_regd;
814
815 reg = &common->regulatory;
816
817 /* Setup TX */
818 error = ath9k_tx_init(priv);
819 if (error != 0)
820 goto err_tx;
821
822 /* Setup RX */
823 error = ath9k_rx_init(priv);
824 if (error != 0)
825 goto err_rx;
826
Sujith Manoharand244f212011-04-28 16:14:05 +0530827#ifdef CONFIG_MAC80211_LEDS
828 /* must be initialized before ieee80211_register_hw */
829 priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
830 IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
831 ARRAY_SIZE(ath9k_htc_tpt_blink));
832#endif
833
Sujithfb9987d2010-03-17 14:25:25 +0530834 /* Register with mac80211 */
835 error = ieee80211_register_hw(hw);
836 if (error)
837 goto err_register;
838
839 /* Handle world regulatory */
840 if (!ath_is_world_regd(reg)) {
841 error = regulatory_hint(hw->wiphy, reg->alpha2);
842 if (error)
843 goto err_world;
844 }
845
Rajkumar Manoharane5facc72011-04-15 15:42:24 +0530846 error = ath9k_htc_init_debug(priv->ah);
847 if (error) {
848 ath_err(common, "Unable to create debugfs files\n");
849 goto err_world;
850 }
851
Joe Perchesd2182b62011-12-15 14:55:53 -0800852 ath_dbg(common, CONFIG,
853 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
Sujith Manoharan3e3f1d12011-02-21 07:50:30 +0530854 priv->wmi_cmd_ep,
855 priv->beacon_ep,
856 priv->cab_ep,
857 priv->uapsd_ep,
858 priv->mgmt_ep,
859 priv->data_be_ep,
860 priv->data_bk_ep,
861 priv->data_vi_ep,
862 priv->data_vo_ep);
863
864 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
865 wiphy_info(hw->wiphy, "%s\n", hw_name);
866
Sujithfb9987d2010-03-17 14:25:25 +0530867 ath9k_init_leds(priv);
868 ath9k_start_rfkill_poll(priv);
869
870 return 0;
871
872err_world:
873 ieee80211_unregister_hw(hw);
874err_register:
875 ath9k_rx_cleanup(priv);
876err_rx:
877 ath9k_tx_cleanup(priv);
878err_tx:
879 /* Nothing */
880err_regd:
Sujith Manoharan29bbfb22011-04-13 11:22:51 +0530881 /* Nothing */
882err_fw:
Sujithfb9987d2010-03-17 14:25:25 +0530883 ath9k_deinit_priv(priv);
884err_init:
885 return error;
886}
887
888int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530889 u16 devid, char *product, u32 drv_info)
Sujithfb9987d2010-03-17 14:25:25 +0530890{
891 struct ieee80211_hw *hw;
892 struct ath9k_htc_priv *priv;
893 int ret;
894
895 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
896 if (!hw)
897 return -ENOMEM;
898
899 priv = hw->priv;
900 priv->hw = hw;
901 priv->htc = htc_handle;
902 priv->dev = dev;
903 htc_handle->drv_priv = priv;
904 SET_IEEE80211_DEV(hw, priv->dev);
905
906 ret = ath9k_htc_wait_for_target(priv);
907 if (ret)
908 goto err_free;
909
910 priv->wmi = ath9k_init_wmi(priv);
911 if (!priv->wmi) {
912 ret = -EINVAL;
913 goto err_free;
914 }
915
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530916 ret = ath9k_init_htc_services(priv, devid, drv_info);
Sujithfb9987d2010-03-17 14:25:25 +0530917 if (ret)
918 goto err_init;
919
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530920 ret = ath9k_init_device(priv, devid, product, drv_info);
Sujithfb9987d2010-03-17 14:25:25 +0530921 if (ret)
922 goto err_init;
923
924 return 0;
925
926err_init:
927 ath9k_deinit_wmi(priv);
928err_free:
929 ieee80211_free_hw(hw);
930 return ret;
931}
932
933void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
934{
935 if (htc_handle->drv_priv) {
Sujitha3be14b2010-04-23 10:28:10 +0530936
937 /* Check if the device has been yanked out. */
938 if (hotunplug)
Sujith Manoharan97dcec52010-12-20 08:02:42 +0530939 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
Sujitha3be14b2010-04-23 10:28:10 +0530940
Sujithfb9987d2010-03-17 14:25:25 +0530941 ath9k_deinit_device(htc_handle->drv_priv);
942 ath9k_deinit_wmi(htc_handle->drv_priv);
943 ieee80211_free_hw(htc_handle->drv_priv->hw);
944 }
945}
946
947#ifdef CONFIG_PM
Sujith Manoharanf933ebe2010-12-01 12:30:27 +0530948
949void ath9k_htc_suspend(struct htc_target *htc_handle)
950{
951 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
952}
953
Sujithfb9987d2010-03-17 14:25:25 +0530954int ath9k_htc_resume(struct htc_target *htc_handle)
955{
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530956 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
Sujithfb9987d2010-03-17 14:25:25 +0530957 int ret;
958
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530959 ret = ath9k_htc_wait_for_target(priv);
Sujithfb9987d2010-03-17 14:25:25 +0530960 if (ret)
961 return ret;
962
Rajkumar Manoharanfa6e15e2010-11-19 16:53:22 +0530963 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
Sujith Manoharan0b5ead92010-12-07 16:31:38 +0530964 priv->ah->hw_version.usbdev);
Sujithfb9987d2010-03-17 14:25:25 +0530965 return ret;
966}
967#endif
968
969static int __init ath9k_htc_init(void)
970{
Rajkumar Manoharane5facc72011-04-15 15:42:24 +0530971 if (ath9k_hif_usb_init() < 0) {
Joe Perches516304b2012-03-18 17:30:52 -0700972 pr_err("No USB devices found, driver not installed\n");
Rajkumar Manoharane5facc72011-04-15 15:42:24 +0530973 return -ENODEV;
Sujithfb9987d2010-03-17 14:25:25 +0530974 }
975
976 return 0;
Sujithfb9987d2010-03-17 14:25:25 +0530977}
978module_init(ath9k_htc_init);
979
980static void __exit ath9k_htc_exit(void)
981{
982 ath9k_hif_usb_exit();
Joe Perches516304b2012-03-18 17:30:52 -0700983 pr_info("Driver unloaded\n");
Sujithfb9987d2010-03-17 14:25:25 +0530984}
985module_exit(ath9k_htc_exit);