website: Add gem5 v21.2 release blog post
Change-Id: I534ed5ca7de8408c71397b6dd50ec06e79073aa1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5-website/+/54963
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
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+---
+layout: post
+title: "gem5-21.2 Released!"
+author: Bobby R. Bruce
+date: 2021-12-28
+categories: project
+---
+
+We are proud to announce version 21.2 of the the gem5 project.
+In this release we incorporated 790 commits from 33 unique authors, new and regular, from both academia and industry.
+We are, as always, thankful to all the time our community puts into maintaining and improving gem5.
+
+## 21.2 Highlights
+
+### Enhanced Standard Library
+
+Having existed since v21.1 under the now deprecated name "the components library", the v21.2 release of gem5 moves the gem5 standard library out of alpha.
+The purpose of the gem5 standard library is to provide gem5 users a standard set of commonly used components and utilities to aid them in their research.
+Our overarching goal with the standard library is to remove "boilerplate" code from gem5 configuration files;
+making the 95% of activities that rarely change from simulation-to-simulation available in an "off-the-shelf" manner to users.
+As an example, a users wishing to experiment with the effects of cache sizes can used the gem5 standard library to setup a processor, memory system, and test on sensible benchmarks, thus freeing them to focus completely on the impact of cache size changes.
+
+The gem5 standard library is a provided as Python package which contains the following:
+
+* **Components**: A set of Python classes which wrap gem5's models.
+Some of the components are pre-configured to match real hardware (e.g., `SingleChannelDDR3_1600`) and others are parameterized.
+Components can be combined together into `boards` which can be simulated.
+* **Resources**: A set of utilities to obtain and incorporate resources (disk images, applications, kernels, etc.) into gem5 simulations.
+Using this module allows you to _automatically_ download and use many of gem5's prebuilt resources (e.g., kernels and disk images) from [gem5-resources](https://www.gem5.org/documentation/general_docs/gem5_resources).
+* **Simulate**: Used to interface with gem5's simulation/run capabilities.
+**Note: This package is in beta.
+Expect API changes to this package in future releases.
+Feedback is appreciated.**
+* **Prebuilt**: These are fully functioning prebuilt systems (`boards`) to use directly in gem5 simulations with minimal setup.
+This release includes an [X86 demo board](https://gem5.googlesource.com/public/gem5/+/refs/tags/v21.2.0.0/src/python/gem5/prebuilt/demo/x86_demo_board.py) and an [example of how it may be used](https://gem5.googlesource.com/public/gem5/+/refs/tags/v21.2.0.0/configs/example/gem5_library/x86-ubuntu-run.py).
+
+**Note:** Usage of the gem5 standard library is optional.
+It does not change any established gem5 API, or how gem5 configuration scripts may be created.
+gem5 configuration scripts that functioned in v21.1 should continue to function in v21.2.
+We do, however, hope the gem5 library can aid users in creating simulations, as is the case with all libraries.
+
+Users can find example configurations scripts that incorporate the gem5 standard library in the gem5 repository's [`configs/example/gem5_library`](https://gem5.googlesource.com/public/gem5/+/refs/tags/v21.2.0.0/configs/example/gem5_library) directory.
+
+As an example of how simple the gem5 standard library can make running a gem5 simulation, consider the following script:
+
+```python
+from gem5.prebuilt.demo.x86_demo_board import X86DemoBoard
+from gem5.resources.resource import Resources
+from gem5.simulate.simulator import Simulators
+
+# Here we setup the board. The prebuilt X86DemoBoard allows for Full-System X86
+# simulation.
+board = X86DemoBoard()
+
+# We then set the workload. Here we use the 5.4.49 Linux kernel with an X86
+# Ubuntu OS. If these cannot be found locally they will be automatically
+# downloaded.
+board.set_kernel_disk_workload(
+ kernel=Resource("x86-linux-kernel-5.4.49"),
+ disk_image=Resource("x86-ubuntu-18.04-img"),
+)
+
+# We then setup the Simulator and run the simulation.
+simulator = Simulator(board=board)
+simulator.run()
+```
+
+This script can be executed with
+
+```sh
+scons build/X86/gem5.opt
+./build/X86/gem5.opt <script>
+```
+
+The script will automatically obtain the correct linux kernel and a disk image containing Ubuntu 18.04 from gem5-resources (if not already present on the host system).
+It will then run a full-system X86 simulation to a complete boot of the operating system, then exit.
+Prior to the introduction of the gem5 standard library, a user would have to put in considerable effort to build such a simulation (100s of lines of python).
+
+While we hope we have designed the standard library in an intuitive manner, users may reference the source under [src/python/gem5](https://gem5.googlesource.com/public/gem5/+/refs/tags/v21.2.0.0/src/python/gem5).
+
+In the coming month we will be updating the gem5 website with new tutorials and documentation on using the gem5 standard library.
+
+#### Future work on the gem5 standard library
+
+Over the next few gem5 releases we will be expanding the standard library to include more components and features.
+An big goal of ours is to provide prebuilt components and systems that are proven to be representative of real-world counterparts.
+
+The `Simulate` module [will be expanded, improved, and moved out of beta state](https://gem5.atlassian.net/browse/GEM5-1125) as its role in the gem5 standard library becomes more clear.
+
+If you wish to report a bug in the gem5 standard library or have a feature request, please submit it to gem5's [Jira site](https://gem5.atlassian.net/).
+Questions regarding usage of the standard library can be made to the [gem5 user's mailing list](https://lists.gem5.org/postorius/lists/gem5-users.gem5.org/).
+
+### LupIO: Friendly IO Devices for gem5.
+
+LupIO devices were developed by [Prof. Joel Porquet-Lupine](https://faculty.engineering.ucdavis.edu/porquet) as a set of open-source I/O devices to be used for teaching.
+They were designed to model a complete set of I/O devices that are neither too complex to teach in a classroom setting, or too simple to translate to understanding real-world devices.
+A goal of two undergraduate students at UC Davis, Melissa Jost and Laura Hinman, was to work on incorporating LupIO devices into gem5.
+As such the gem5 v21.2 release includes a LupIO real-time clock, a random number generator, a terminal device, a block device, a system controller, a timer device, a programmable interrupt controller, and an inter-processor interrupt controller.
+
+A more detailed outline of LupIO can be found in Prof. Porquet-Lupine's paper ["LupIO: a collection fo education-friendly I/O devices"](https://luplab.cs.ucdavis.edu/assets/lupio/wcae21-porquet-lupio-paper.pdf) and information on the wider LupLab research group can be found on [their website](https://luplab.cs.ucdavis.edu/).
+
+Users wishing to try out LupIO devices can find an example script and README file in the [`configs/example/lupv`](https://gem5.googlesource.com/public/gem5/+/refs/tags/v21.2.0.0/configs/example/lupv) directory.
+
+**Note:** These LupIO devices have been built and tested for RISC-V.
+However, there is no reason these couldn't be modified to work with other ISA targets if required or desired.
+We welcome further development by the gem5 community.
+
+### Arm improvements
+
+In continued and welcome collaboration with Arm Holdings, improvements to gem5 Arm implementations have been made.
+They are:
+
+* [Improved configurability for Arm architectural extensions](https://gem5.atlassian.net/browse/GEM5-1132): We have improved how architectural extensions are enabled/disabled for an Arm system.
+Rather than working with independent boolean values, we now use a unified `ArmRelease` object which models the architectural features supported by a FS/SE Arm simulation.
+* [Arm TLB can store partial entries](https://gem5.atlassian.net/browse/GEM5-1108): It is now possible to configure an `ArmTLB` as a walk cache which stores intermediate PAs obtained during a translation table walk.
+* [Implemented a multilevel LB hierarchy](https://gem5.atlassian.net/browse/GEM5-790): Users can now compose/model a customizable multilevel TLB hierarchy in gem5.
+The default Arm MMU now has an Instruction LA TLB, a Data L1 TLB, and Unified (Instruction + Data) L2 TLB.
+* [Provided an Arm example script for the gem5-SST integration](https://gem5.atlassian.net/browse/GEM5-1121).
+
+### GPU Improvements
+
+Continued efforts by, primarily, AMD, Inc. and the University of Wisconsin have improved gem5's GPU support.
+In this release:
+
+* **Vega support**: gfx900 (Vega) discrete GPUs are now both supported and tested with [gem5-resources applications](https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/gpu/).
+* **Additional GPU applications**: The [Pannotia graph analytics benchmark suite](https://github.com/pannotia/pannotia) has been added to gem5-resources, including Makefiles, READMEs, and sample commands on how to run each application in gem5.
+* **Regression Testing**: Several GPU applications are now tested as part of the nightly and weekly regressions, which improves test coverage and avoids introducing inadvertent bugs.
+* **Minor updates to the architectural model**: Small changes and fixes have been made to the HSA queue size (to allow larger GPU applications with many kernels to run), and the TLB (to create GCN4- and Vega-specific TLBs). We have also added new instructions that were previously unimplemented in GCN4 and Vega, and fixed corner cases for some instructions that were leading to incorrect behavior.
+
+### gem5-SST bridge revived
+
+In recent versions of gem5, we sadly lost the ability to integrate with the [Structural Simulation Toolkit](http://sst-simulator.org) (SST).
+In collaboration with the SST community, we have revived support for connecting gem5 cores to the SST memory system.
+In v21.2 release, this has been tested for RISC-V and Arm.
+More information on setting up and running gem5 with SST can be found in [`ext/sst/README.md`](https://gem5.googlesource.com/public/gem5/+/refs/tags/v21.2.0.0/ext/sst/README.md).
+
+## New/Changed APIS
+
+* **[API CHANGE]**: All `SimObject` declarations in SConscript files now require a `sim_objects` parameter that lists all SimObject classes declared in that file which need C++ wrappers (that is, SimObject classes which have a `type` attribute defined).
+
+* **[NEW CHANGE]**: There is now an optional `enums` parameter for `SimObject` classes which must list all the Enum types defined in that SimObject file.
+Technically, this should only include Enum types which generate C++ wrappers though, as of v21.2, all Enums do so.
+
+## Other v21.2 improvements
+
+* The master/slave terminology has been removed.
+This has been an on-going effort for several gem5 releases.
+The gem5 codebase is now free of its usage.
+* Arm v8.2-A FEAT_UAO has been implemented.
+* [The "at" variants of the file system call have been implemented in SE mode](https://gem5.atlassian.net/browse/GEM5-1098).
+* The SConscripts have been refactored for improved modularity.
+* New "tester" CPUs have been introduced which mimic GUPS.
