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| Modifying/Extending |
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| <a class="subitem " href="/environment">Setting up your development environment</a> |
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| Modeling Cache Coherence with Ruby |
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| <a class="subitem " href="/MSIintro">Introduction to Ruby</a> |
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| <a class="subitem active" href="/cache-intro">MSI example cache protocol</a> |
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| <a class="subitem " href="/cache-declarations">Declaring a state machine</a> |
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| <a class="subitem " href="/directory">MSI Directory implementation</a> |
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| <a class="subitem " href="/MSIbuilding">Compiling a SLICC protocol</a> |
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| <div class="edit"><a href="https://github.com/gem5/new-website/tree/master/_pages/documentation/part3/cache-intro.md">Edit this page</a></div> |
| <dl> |
| <dt>authors</dt> |
| <dd>Jason Lowe-Power</dd> |
| </dl> |
| |
| <h1 id="msi-example-cache-protocol">MSI example cache protocol</h1> |
| |
| <p>Before we implement a cache coherence protocol, it is important to have |
| a solid understanding of cache coherence. This section leans heavily on |
| the great book <em>A Primer on Memory Consistency and Cache Coherence</em> by |
| Daniel J. Sorin, Mark D. Hill, and David A. Wood which was published as |
| part of the Synthesis Lectures on Computer Architecture in 2011 |
| (<a href="DOI:`10.2200/S00346ED1V01Y201104CAC016">DOI:`10.2200/S00346ED1V01Y201104CAC016</a> |
| <<https://doi.org/10.2200/S00346ED1V01Y201104CAC016>>_). |
| If you are unfamiliar with cache coherence, I strongly advise reading that book before continuing.</p> |
| |
| <p>In this chapter, we will be implementing an MSI protocol. |
| (An MSI protocol has three stable states, modified with read-write permission, shared with read-only permission, and invalid with no permissions.) |
| We will implement this as a three-hop directory protocol (i.e., caches can send data directly to other caches without going through the directory). |
| Details for the protocol can be found in Section 8.2 of the *Primer on Memory Consistency and Cache Coherence* (pages 141-149). |
| It will be helpful to print out Section 8.2 to reference as you are implementing the protocol.</p> |
| |
| <p>You can download an exceprt of Sorin et al. that contains Section 8.2 :download:here |
| <../../_static/external/Sorin_et-al_Excerpt_8.2.pdf>.</p> |
| |
| <p>First steps to writing a protocol |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</p> |
| |
| <p>Let’s start by creating a new directory for our protocol: src/learning_gem5/MSI_protocol. |
| In this directory, like in all gem5 source directories, we need to create a file for SCons to know what to compile. |
| However, this time, instead of creating a SConscript` file, we are |
| going to create a <code class="highlighter-rouge">SConsopts</code> file. (The <code class="highlighter-rouge">SConsopts</code> files are processed |
| before the <code class="highlighter-rouge">SConscript</code> files and we need to run the SLICC compiler |
| before SCons executes.)</p> |
| |
| <p>We need to create a <code class="highlighter-rouge">SConsopts</code> file with the following:</p> |
| |
| <p>``` {.sourceCode .python} |
| Import(‘*’)</p> |
| |
| <p>all_protocols.extend([ |
| ‘MSI’, |
| ])</p> |
| |
| <p>protocol_dirs.append(str(Dir(‘.’).abspath)) |
| ```</p> |
| |
| <p>We do two things in this file. First, we register the name of our |
| protocol (<code class="highlighter-rouge">'MSI'</code>). Since we have named our protocol MSI, SCons will |
| assume that there is a file named <code class="highlighter-rouge">MSI.slicc</code> which specifies all of the |
| state machine files and auxiliary files. We will create that file after |
| writing all of our state machine files. Second, the <code class="highlighter-rouge">SConsopts</code> files |
| tells the SCons to look in the current directory for files to pass to |
| the SLICC compiler.</p> |
| |
| <p>You can download the <code class="highlighter-rouge">SConsopts</code> file |
| here <../../_static/scripts/part3/MSI_protocol/SConsopts>.</p> |
| |
| <h2 id="writing-a-state-machine-file">Writing a state machine file</h2> |
| |
| <p>The next step, and most of the effort in writing a protocol, is to |
| create the state machine files. State machine files generally follow the |
| outline:</p> |
| |
| <dl> |
| <dt>Parameters</dt> |
| <dd>These are the parameters for the SimObject that will be generated |
| from the SLICC code.</dd> |
| <dt>Declaring required structures and functions</dt> |
| <dd>This section declares the states, events, and many other required |
| structures for the state machine.</dd> |
| <dt>In port code blocks</dt> |
| <dd>Contain code that looks at incoming messages from the (<code class="highlighter-rouge">in_port</code>) |
| message buffers and determines what events to trigger.</dd> |
| <dt>Actions</dt> |
| <dd>These are simple one-effect code blocks (e.g., send a message) that |
| are executed when going through a transition.</dd> |
| <dt>Transitions</dt> |
| <dd>Specify actions to execute given a starting state and an event and |
| the final state. This is the meat of the state machine definition.</dd> |
| </dl> |
| |
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