fastmodel: Checkpoint the TCs when checkpointing a fast model CPU.
The generic thread context checkpointing code can be used which calls
into the ThreadContext methods to read the required state.
Change-Id: Ib5c318ff4d2e756274b4c90b56533b2689a837f2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23785
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
diff --git a/src/arch/arm/fastmodel/iris/cpu.cc b/src/arch/arm/fastmodel/iris/cpu.cc
index e5d95ef..6c282b6 100644
--- a/src/arch/arm/fastmodel/iris/cpu.cc
+++ b/src/arch/arm/fastmodel/iris/cpu.cc
@@ -31,6 +31,7 @@
#include "arch/arm/fastmodel/iris/thread_context.hh"
#include "scx/scx.h"
+#include "sim/serialize.hh"
namespace Iris
{
@@ -93,4 +94,10 @@
tc->initMemProxies(tc);
}
+void
+BaseCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
+{
+ ::serialize(*threadContexts[tid], cp);
+}
+
} // namespace Iris
diff --git a/src/arch/arm/fastmodel/iris/cpu.hh b/src/arch/arm/fastmodel/iris/cpu.hh
index 0d15fc8..3b913b9 100644
--- a/src/arch/arm/fastmodel/iris/cpu.hh
+++ b/src/arch/arm/fastmodel/iris/cpu.hh
@@ -118,6 +118,8 @@
}
void init() override;
+
+ void serializeThread(CheckpointOut &cp, ThreadID tid) const override;
};
// This class specializes the one above and sets up ThreadContexts based on
