arch-x86: Adding warning for movnti
We are ignoring the non-temporal hint here, and implementing this
instruction as a cacheable instruction.
This change adds a warning to let user know about this workaround.
Change-Id: I2e40437a44282fe9cf7772a25a8870bd8729a6ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20428
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index a23531c..348bff3 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -878,6 +878,8 @@
// no prefix
0x0: decode OPCODE_OP_BOTTOM3 {
0x2: CMPPS(Vo,Wo,Ib);
+ //Non-temporal hint is ignored since we don't have
+ //proper support for it in the memory system.
0x3: MOVNTI(Mdp,Gdp);
0x4: PINSRW(Pq,Ew,Ib);
0x5: PEXTRW(Gd,PRq,Ib);
diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
index 13d2f18..91cf92a 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
@@ -333,10 +333,12 @@
};
def macroop MOVNTI_M_R {
+ warn_once "MOVNTI: Ignoring non-temporal hint, modeling as cacheable!"
st reg, seg, sib, disp
};
def macroop MOVNTI_P_R {
+ warn_once "MOVNTI_P: Ignoring non-temporal hint, modeling as cacheable!"
rdip t7
st reg, seg, riprel, disp
};
