src/arch/riscv/reg_abi.hh

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#ifndef __ARCH_RISCV_REG_ABI_HH__
#define __ARCH_RISCV_REG_ABI_HH__

#include <vector>

#include "sim/syscall_abi.hh"

namespace gem5
{

namespace RiscvISA
{

//FIXME RISCV needs to handle 64 bit arguments in its 32 bit ISA.
struct RegABI64 : public GenericSyscallABI64
{
    static const std::vector<RegId> ArgumentRegs;
};

} // namespace RiscvISA
} // namespace gem5

#endif // __ARCH_RISCV_REG_ABI_HH__