src/arch/x86/insts/microspecop.hh

/*
 * Copyright 2021 Google Inc.
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#ifndef __ARCH_X86_INSTS_MICROSPECOP_HH__
#define __ARCH_X86_INSTS_MICROSPECOP_HH__

#include "arch/x86/insts/microop.hh"
#include "cpu/exec_context.hh"

namespace gem5
{

namespace X86ISA
{

class MicroHalt : public InstOperands<X86MicroopBase>
{
  public:
    MicroHalt(ExtMachInst mach_inst, const char *inst_mnem,
            uint64_t set_flags) :
        InstOperands<X86MicroopBase>(mach_inst, "halt", inst_mnem,
                set_flags | (1ULL << StaticInst::IsNonSpeculative) |
                            (1ULL << StaticInst::IsQuiesce),
                No_OpClass, {})
    {}

    Fault
    execute(ExecContext *xc, Trace::InstRecord *) const override
    {
        xc->tcBase()->suspend();
        return NoFault;
    }
};

} // namespace X86ISA
} // namespace gem5

#endif //__ARCH_X86_INSTS_MICROSPECOP_HH__