arch-x86: Adding LDDQU instruction
Tested with simple c binaries.
Signed-off-by: marjanfariborz <mfariborz@ucdavis.edu>
Change-Id: I2f0852b136f966381d29af523e8ffdbca795afcd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23262
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index 1e09243..51154d5 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -1067,7 +1067,7 @@
}
// repne (0xF2)
0x8: decode OPCODE_OP_BOTTOM3 {
- 0x0: WarnUnimpl::lddqu_Vo_Mo();
+ 0x0: LDDQU(Vo,Mq);
default: UD2();
}
default: UD2();
diff --git a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
index 301aeae..8d147b9 100644
--- a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py
@@ -123,5 +123,15 @@
stfp xmml, seg, riprel, "DISPLACEMENT", dataSize=8
stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8
};
+
+def macroop LDDQU_XMM_M {
+ ldfp xmml, seg, sib, "DISPLACEMENT", dataSize=8
+ ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
+};
+
+def macroop LDDQU_XMM_P {
+ rdip t7
+ ldfp xmml, seg, sib, "DISPLACEMENT", dataSize=8
+ ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8
+};
'''
-# LDDQU
