fastmodel: Implement port proxies.
This plumbing is simple and largely copied from other implementations
within gem5. This mechanism should be refactored so that the
duplication is unnecessary.
Change-Id: Ibcdf759b7fba1d574e8e2ba04249afdd92c6560c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22120
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/arm/fastmodel/iris/cpu.cc b/src/arch/arm/fastmodel/iris/cpu.cc
index 8284d17..d66cf1d 100644
--- a/src/arch/arm/fastmodel/iris/cpu.cc
+++ b/src/arch/arm/fastmodel/iris/cpu.cc
@@ -78,4 +78,12 @@
return count;
}
+void
+BaseCPU::init()
+{
+ ::BaseCPU::init();
+ for (auto *tc: threadContexts)
+ tc->initMemProxies(tc);
+}
+
} // namespace Iris
diff --git a/src/arch/arm/fastmodel/iris/cpu.hh b/src/arch/arm/fastmodel/iris/cpu.hh
index ef83978..0d15fc8 100644
--- a/src/arch/arm/fastmodel/iris/cpu.hh
+++ b/src/arch/arm/fastmodel/iris/cpu.hh
@@ -116,6 +116,8 @@
periodAttribute->value = clockPeriod();
clockEvent->notify();
}
+
+ void init() override;
};
// This class specializes the one above and sets up ThreadContexts based on
diff --git a/src/arch/arm/fastmodel/iris/thread_context.cc b/src/arch/arm/fastmodel/iris/thread_context.cc
index 8974895..00c41ba 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.cc
+++ b/src/arch/arm/fastmodel/iris/thread_context.cc
@@ -31,6 +31,8 @@
#include "iris/detail/IrisCppAdapter.h"
#include "iris/detail/IrisObjects.h"
+#include "mem/fs_translating_port_proxy.hh"
+#include "mem/se_translating_port_proxy.hh"
namespace Iris
{
@@ -291,6 +293,22 @@
return count;
}
+void
+ThreadContext::initMemProxies(::ThreadContext *tc)
+{
+ if (FullSystem) {
+ assert(!physProxy && !virtProxy);
+ physProxy.reset(new PortProxy(_cpu->getSendFunctional(),
+ _cpu->cacheLineSize()));
+ virtProxy.reset(new FSTranslatingPortProxy(tc));
+ } else {
+ assert(!virtProxy);
+ virtProxy.reset(new SETranslatingPortProxy(
+ _cpu->getSendFunctional(), getProcessPtr(),
+ SETranslatingPortProxy::NextPage));
+ }
+}
+
ThreadContext::Status
ThreadContext::status() const
{
diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh
index 49b3325..8d2070a 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -30,6 +30,8 @@
#ifndef __ARCH_ARM_FASTMODEL_IRIS_THREAD_CONTEXT_HH__
#define __ARCH_ARM_FASTMODEL_IRIS_THREAD_CONTEXT_HH__
+#include <memory>
+
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "iris/IrisInstance.h"
@@ -77,6 +79,9 @@
std::vector<iris::MemorySpaceInfo> memorySpaces;
std::vector<iris::MemorySupportedAddressTranslationResult> translations;
+ std::unique_ptr<PortProxy> virtProxy = nullptr;
+ std::unique_ptr<PortProxy> physProxy = nullptr;
+
// A queue to keep track of instruction count based events.
EventQueue comInstEventQueue;
@@ -161,21 +166,11 @@
{
panic("%s not implemented.", __FUNCTION__);
}
- PortProxy &
- getPhysProxy() override
- {
- panic("%s not implemented.", __FUNCTION__);
- }
- PortProxy &
- getVirtProxy() override
- {
- panic("%s not implemented.", __FUNCTION__);
- }
- void
- initMemProxies(::ThreadContext *tc) override
- {
- panic("%s not implemented.", __FUNCTION__);
- }
+
+ PortProxy &getPhysProxy() override { return *physProxy; }
+ PortProxy &getVirtProxy() override { return *virtProxy; }
+ void initMemProxies(::ThreadContext *tc) override;
+
Process *
getProcessPtr() override
{
