commit 1c31181958b53971f5940b80678fa4646ddb6c12
author Giacomo Travaglini <giacomo.travaglini@arm.com> Mon Dec 18 15:06:51 2017 +0000
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Wed Apr 18 14:42:22 2018 +0000
tree d9539ff674ee2bbccd0706ac0e3cf35af09e986e
parent fcec1bf88c0f2e14f3c0c2dd59475757a7a6b00d

arch-arm: Adding MiscReg Priv (EL1) global flag

This patch introduces a single global flag for setting RW access
permission at EL1 level, in either secure and non-secure mode.

Change-Id: I35df66a73349044ca996b5c04c5a2476f3a7abdf
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10042
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/arch/arm/isa.hh

diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index c10a88a..c8ae5c2 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -199,6 +199,11 @@
                 info[MISCREG_PRI_NS_WR] = v;
                 return *this;
             }
+            chain privNonSecure(bool v = true) const {
+                privNonSecureRead(v);
+                privNonSecureWrite(v);
+                return *this;
+            }
             chain privSecureRead(bool v = true) const {
                 info[MISCREG_PRI_S_RD] = v;
                 return *this;
@@ -212,6 +217,11 @@
                 privSecureWrite(v);
                 return *this;
             }
+            chain priv(bool v = true) const {
+                privSecure(v);
+                privNonSecure(v);
+                return *this;
+            }
             chain hypRead(bool v = true) const {
                 info[MISCREG_HYP_RD] = v;
                 return *this;