src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py

# Copyright (c) 2007 The Hewlett-Packard Development Company
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microcode = '''

# All the memory versions need to use LOCK, regardless of if it was set

def macroop XCHG_R_R
{
    # Use the xor trick instead of moves to reduce register pressure.
    # This probably doesn't make much of a difference, but it's easy.
    xor reg, reg, regm
    xor regm, regm, reg
    xor reg, reg, regm
};

def macroop XCHG_R_M
{
    mfence
    ldstl t1, seg, sib, disp
    stul reg, seg, sib, disp
    mfence
    mov reg, reg, t1
};

def macroop XCHG_R_P
{
    rdip t7
    mfence
    ldstl t1, seg, riprel, disp
    stul reg, seg, riprel, disp
    mfence
    mov reg, reg, t1
};

def macroop XCHG_M_R
{
    mfence
    ldstl t1, seg, sib, disp
    stul reg, seg, sib, disp
    mfence
    mov reg, reg, t1
};

def macroop XCHG_P_R
{
    rdip t7
    mfence
    ldstl t1, seg, riprel, disp
    stul reg, seg, riprel, disp
    mfence
    mov reg, reg, t1
};

def macroop XCHG_LOCKED_M_R
{
    mfence
    ldstl t1, seg, sib, disp
    stul reg, seg, sib, disp
    mfence
    mov reg, reg, t1
};

def macroop XCHG_LOCKED_P_R
{
    rdip t7
    mfence
    ldstl t1, seg, riprel, disp
    stul reg, seg, riprel, disp
    mfence
    mov reg, reg, t1
};
'''