commit 24fd87af28254656029df6fc4fdd995b5f392e21
author Chun-Chen TK Hsu <chunchenhsu@google.com> Mon Jul 29 19:51:21 2019 +0800
committer Chun-Chen TK Hsu <chunchenhsu@google.com> Tue Jul 30 09:21:06 2019 +0000
tree d18d992cd9ba08f61aaffe949c5ac1a894461e5e
parent 5bb6210b10bf4a7a678dc41e6f7c9493842247b9

system-arm: Add irq for hypervisor timer in device tree

ARM fast model CPU cannot get timer interrupts without this IRQ setting
in the device tree.

Change-Id: I084c475c04285f4f40eb38a80ddd038207e4764f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19650
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

system/arm/dt/platforms/vexpress_gem5_v1_base.dtsi

diff --git a/system/arm/dt/platforms/vexpress_gem5_v1_base.dtsi b/system/arm/dt/platforms/vexpress_gem5_v1_base.dtsi
index 54a02b2..61a0104 100644
--- a/system/arm/dt/platforms/vexpress_gem5_v1_base.dtsi
+++ b/system/arm/dt/platforms/vexpress_gem5_v1_base.dtsi
@@ -53,7 +53,8 @@
 			     "arm,armv7-timer";
 		interrupts = <1 13 0xf08>,
 		             <1 14 0xf08>,
-		             <1 11 0xf08>;
+		             <1 11 0xf08>,
+		             <1 10 0xf08>;
 		clocks = <&osc_sys>;
 		clock-names="apb_pclk";
 	};

system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi

diff --git a/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi b/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi
index 9cdee85..b901b92 100644
--- a/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi
+++ b/system/arm/dt/platforms/vexpress_gem5_v2_base.dtsi
@@ -55,7 +55,8 @@
 			     "arm,armv7-timer";
 		interrupts = <1 13 0xf08>,
 		             <1 14 0xf08>,
-		             <1 11 0xf08>;
+			     <1 11 0xf08>,
+		             <1 10 0xf08>;
 		clocks = <&osc_sys>;
 		clock-names="apb_pclk";
 	};