commit 251cbd34b82670ec8038bfee6d050f080e9b3981
author Adrian Herrera <adrian.herrera@arm.com> Fri Nov 29 17:22:28 2019 +0000
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Wed Jan 15 09:26:10 2020 +0000
tree 8aa8ace030b9c05dff7d6a267324cd11206656cb
parent 226fa0cd940accb7809e68d74d1d735f8fef8bc9

arch-arm: Virtualization Host Extensions checking

This patch adds Armv8.1-VHE checking. This is based on the bit
ID_AA64MMFR1_EL1.VH being 0b1.

Change-Id: Ia3f278c63fe1b5448a686db87a46853fc8b6bea5
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24045
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/utility.cc

diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 5ab5645..a82fec4 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -290,6 +290,13 @@
 }
 
 bool
+HaveVirtHostExt(ThreadContext *tc)
+{
+    AA64MMFR1 id_aa64mmfr1 = tc->readMiscReg(MISCREG_ID_AA64MMFR1_EL1);
+    return id_aa64mmfr1.vh;
+}
+
+bool
 HaveSecureEL2Ext(ThreadContext *tc)
 {
     AA64PFR0 id_aa64pfr0 = tc->readMiscReg(MISCREG_ID_AA64PFR0_EL1);

src/arch/arm/utility.hh

diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 7ec44f8..4d1348a 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -166,6 +166,7 @@
     return opModeToEL((OperatingMode) (uint8_t)cpsr.mode);
 }
 
+bool HaveVirtHostExt(ThreadContext *tc);
 bool HaveSecureEL2Ext(ThreadContext *tc);
 bool IsSecureEL2Enabled(ThreadContext *tc);
 bool EL2Enabled(ThreadContext *tc);