src/arch/riscv/RiscvInterrupts.py

# Copyright (c) 2008 The Regents of The University of Michigan
# Copyright (c) 2014 Sven Karlsson
# Copyright (c) 2016 RISC-V Foundation
# Copyright (c) 2016 The University of Virginia
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# modification, are permitted provided that the following conditions are
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# redistributions in binary form must reproduce the above copyright
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# this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# Authors: Gabe Black
#          Sven Karlsson
#          Alec Roelke

from m5.SimObject import SimObject

class RiscvInterrupts(SimObject):
    type = 'RiscvInterrupts'
    cxx_class = 'RiscvISA::Interrupts'
    cxx_header = 'arch/riscv/interrupts.hh'