arch-arm: Fix clasta/b and lasta/b simd&fp instructions
The simd&fp version of this instructions required zeroing the result
vector except for the first element, that contains the result.
Change-Id: I231ad3c44d89f34acae26d299ab676e2ed09acdc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28247
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index 06ff728..aa4f194 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -2432,7 +2432,16 @@
elif destType == DstRegType.SimdFpScalar:
code += ''' else {
AA64FpDest_x[0] = AA64FpDestMerge_x[0];
- }'''
+ }
+ '''
+ if destType == DstRegType.SimdFpScalar:
+ # This section will extend zeros to the simdFP scalar
+ # intructions for lasta/b and Clasta/b
+ code += '''
+ for (int i = 1; i < eCount; ++i) {
+ AA64FpDest_x[i] = (Element)0x0;
+ }
+ '''
iop = InstObjParams(name, 'Sve' + Name, 'SveSelectOp',
{'code': code, 'op_class': opClass,
'isCond': 'true' if isCond else 'false',
