arch-arm, sim-se: Fix incorrect SP handling in clone

The clone syscall is currently broken on aarch64 since the aarch64
code uses an incorrect SP register. Fix this by storing the new stack
pointer in SP_EL0 instead of R13.

Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Cc: Giacomo Travaglini <giacomo.travaglini@arm.com>
Cc: Javier Setoain <javier.setoain@arm.com>
Cc: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15436
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index 9e9ca1f..e1f27a7 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -58,9 +58,6 @@
               uint64_t stack, uint64_t tls)
     {
         ArmISA::copyRegs(ptc, ctc);
-
-        if (stack)
-            ctc->setIntReg(TheISA::StackPointerReg, stack);
     }
 };
 
@@ -271,6 +268,18 @@
         int32_t tms_cutime;     //!< user time of children
         int32_t tms_cstime;     //!< system time of children
     };
+
+    static void
+    archClone(uint64_t flags,
+              Process *pp, Process *cp,
+              ThreadContext *ptc, ThreadContext *ctc,
+              uint64_t stack, uint64_t tls)
+    {
+        ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls);
+
+        if (stack)
+            ctc->setIntReg(ArmISA::INTREG_SP, stack);
+    }
 };
 
 class ArmLinux64 : public ArmLinux
@@ -516,6 +525,17 @@
         int64_t tms_cutime;     //!< user time of children
         int64_t tms_cstime;     //!< system time of children
     };
+
+    static void archClone(uint64_t flags,
+                          Process *pp, Process *cp,
+                          ThreadContext *ptc, ThreadContext *ctc,
+                          uint64_t stack, uint64_t tls)
+    {
+        ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls);
+
+        if (stack)
+            ctc->setIntReg(ArmISA::INTREG_SP0, stack);
+    }
 };
 
 #endif