src/arch/riscv/linux/se_workload.hh

/*
 * Copyright 2004 The Regents of The University of Michigan
 * Copyright 2016 The University of Virginia
 * Copyright 2020 Google Inc.
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 * redistributions in binary form must reproduce the above copyright
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#ifndef __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__
#define __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__

#include "arch/riscv/linux/linux.hh"
#include "arch/riscv/page_size.hh"
#include "arch/riscv/se_workload.hh"
#include "params/RiscvEmuLinux.hh"
#include "sim/syscall_desc.hh"

namespace gem5
{

namespace RiscvISA
{

class EmuLinux : public SEWorkload
{
  protected:

    /// 64 bit syscall descriptors, indexed by call number.
    static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs64;

    /// 32 bit syscall descriptors, indexed by call number.
    static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs32;

  public:
    using Params = RiscvEmuLinuxParams;

    EmuLinux(const Params &p) : SEWorkload(p, PageShift) {}

    ByteOrder byteOrder() const override { return ByteOrder::little; }

    void syscall(ThreadContext *tc) override;
};

} // namespace RiscvISA
} // namespace gem5

#endif // __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__