| # -*- mode:python -*- |
| |
| # Copyright (c) 2009, 2013, 2015, 2021 Arm Limited |
| # All rights reserved. |
| # |
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| # to a hardware implementation of the functionality of the software |
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| # terms below provided that you ensure that this notice is replicated |
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| # modified or unmodified, in source code or in binary form. |
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| # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| |
| from m5.SimObject import SimObject |
| from m5.params import * |
| from m5.proxy import * |
| from m5.objects.BaseTLB import BaseTLB |
| |
| class ArmLookupLevel(Enum): |
| vals = [ "L0", "L1", "L2", "L3" ] |
| |
| class ArmTLB(BaseTLB): |
| type = 'ArmTLB' |
| cxx_class = 'gem5::ArmISA::TLB' |
| cxx_header = "arch/arm/tlb.hh" |
| sys = Param.System(Parent.any, "system object parameter") |
| size = Param.Int(64, "TLB size") |
| is_stage2 = Param.Bool(False, "Is this a stage 2 TLB?") |
| |
| class ArmStage2TLB(ArmTLB): |
| size = 32 |
| is_stage2 = True |