commit | 4dccd7dd6c69971541be2cbb0de4a2fe2b52f3ac | [log] [tgz] |
---|---|---|
author | Roger Chang <rogerycchang@google.com> | Sat May 13 21:42:39 2023 +0800 |
committer | Roger Chang <rogerycchang@google.com> | Tue May 23 23:58:16 2023 +0000 |
tree | f0737bedac38fb3505e9dbf2703a91af9c4afcf7 | |
parent | 1a2904e021671374d20527b46a10d2de2ae310ce [diff] |
arch-riscv: Add BS format isa This format is helper for aes32dsi, aes32dsmi, aes32esi, aes32esmi, sm4ed, sm4ks disassembly Change-Id: Ieff1932e267efc0a8c5fd8e557fc467dc376da4e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70598 Reviewed-by: Yu-hsin Wang <yuhsingw@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com>