src/arch/sparc/isa/includes.isa

// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
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// redistributions in binary form must reproduce the above copyright
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// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
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////////////////////////////////////////////////////////////////////
//
// Output include file directives.
//

output header {{
#include <cstring>
#include <iostream>
#include <sstream>

#include "arch/sparc/faults.hh"
#include "arch/sparc/insts/blockmem.hh"
#include "arch/sparc/insts/branch.hh"
#include "arch/sparc/insts/integer.hh"
#include "arch/sparc/insts/mem.hh"
#include "arch/sparc/insts/micro.hh"
#include "arch/sparc/insts/nop.hh"
#include "arch/sparc/insts/priv.hh"
#include "arch/sparc/insts/static_inst.hh"
#include "arch/sparc/insts/trap.hh"
#include "arch/sparc/insts/unimp.hh"
#include "arch/sparc/insts/unknown.hh"
#include "arch/sparc/regs/int.hh"
#include "arch/sparc/regs/misc.hh"
#include "base/condcodes.hh"
#include "base/logging.hh"
#include "cpu/static_inst.hh"
#include "mem/packet.hh"
#include "mem/request.hh"  // some constructors use MemReq flags

}};

output decoder {{
#include <algorithm>

#include "arch/sparc/decoder.hh"
#include "base/cprintf.hh"
#include "base/fenv.hh"
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh"  // for Jump::branchTarget()
#include "mem/packet.hh"

namespace gem5::SparcISAInst
{
using namespace SparcISA;
} // namespace gem5::SparcISAInst
}};

output exec {{
#include <cmath>
#include <limits>

#include "arch/generic/memhelpers.hh"
#include "arch/sparc/asi.hh"
#include "arch/sparc/pseudo_inst_abi.hh"
#include "base/fenv.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "debug/Sparc.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/full_system.hh"
#include "sim/pseudo_inst.hh"
#include "sim/sim_exit.hh"

namespace gem5::SparcISAInst
{
using namespace SparcISA;
} // namespace gem5::SparcISAInst
}};