src/dev/riscv/SConscript

# -*- mode:python -*-

# Copyright (c) 2021 Huawei International
# Copyright (c) 2022 EXAscale Performance SYStems (EXAPSYS)
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Import('*')

SimObject('HiFive.py', sim_objects=['HiFive', 'GenericRiscvPciHost'],
          tags='riscv isa')
SimObject('LupV.py', sim_objects=['LupV'], tags='riscv isa')
SimObject('Clint.py', sim_objects=['Clint'], tags='riscv isa')
SimObject('PlicDevice.py', sim_objects=['PlicIntDevice'], tags='riscv isa')
SimObject('Plic.py', sim_objects=['Plic'], tags='riscv isa')
SimObject('RTC.py', sim_objects=['RiscvRTC'], tags='riscv isa')
SimObject('RiscvVirtIOMMIO.py', sim_objects=['RiscvMmioVirtIO'],
    tags='riscv isa')

DebugFlag('Clint', tags='riscv isa')
DebugFlag('Plic', tags='riscv isa')
DebugFlag('VirtIOMMIO', tags='riscv isa')

Source('pci_host.cc', tags='riscv isa')

Source('hifive.cc', tags='riscv isa')
Source('lupv.cc', tags='riscv isa')
Source('clint.cc', tags='riscv isa')
Source('plic_device.cc', tags='riscv isa')
Source('plic.cc', tags='riscv isa')
Source('rtc.cc', tags='riscv isa')
Source('vio_mmio.cc', tags='riscv isa')