fastmodel: Expose all CPU communication ports from the GIC.
The unconnected CPU ports/sockets still need to be connected for TLM to
be happy, so this change also adds a terminator module which finds all
unbound sockets, creates pair sockets for them to connect to, binds
everything together, and implements the target interface with a dummy
stub that will complain and crash gem5 if it ever gets called.
This will allow us to use the same GIC model to connect an arbitrary
number of cores, up to the architected limit of 256.
Change-Id: Iaa83fe4f023217dc91a3734b31f764fc4176130e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21500
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/arm/fastmodel/GIC/FastModelGIC.py b/src/arch/arm/fastmodel/GIC/FastModelGIC.py
index 6390edf..53b7e1a 100644
--- a/src/arch/arm/fastmodel/GIC/FastModelGIC.py
+++ b/src/arch/arm/fastmodel/GIC/FastModelGIC.py
@@ -47,6 +47,11 @@
super(Gicv3CommsInitiatorSocket, self).__init__(
GICV3_COMMS_TARGET_ROLE, desc, is_source=True)
+class VectorGicv3CommsInitiatorSocket(VectorPort):
+ def __init__(self, desc):
+ super(VectorGicv3CommsInitiatorSocket, self).__init__(
+ GICV3_COMMS_TARGET_ROLE, desc, is_source=True)
+
class SCFastModelGIC(SystemC_ScModule):
type = 'SCFastModelGIC'
@@ -457,4 +462,5 @@
amba_m = AmbaInitiatorSocket(64, 'Memory initiator socket')
amba_s = AmbaTargetSocket(64, 'Memory target socket')
- redistributor = Gicv3CommsInitiatorSocket('GIC communication initiator')
+ redistributor = VectorGicv3CommsInitiatorSocket(
+ 'GIC communication initiator')
diff --git a/src/arch/arm/fastmodel/GIC/GIC.lisa b/src/arch/arm/fastmodel/GIC/GIC.lisa
index 098b51d..7f00d75 100644
--- a/src/arch/arm/fastmodel/GIC/GIC.lisa
+++ b/src/arch/arm/fastmodel/GIC/GIC.lisa
@@ -325,7 +325,7 @@
master port<AMBAPV> amba_m;
slave port<AMBAPV> amba_s;
- master port<GICv3Comms> redistributor;
+ master port<GICv3Comms> redistributor[256];
#define setPPI(C) \
case C: ppi_##C[num].setValue(state); \
diff --git a/src/arch/arm/fastmodel/GIC/gic.cc b/src/arch/arm/fastmodel/GIC/gic.cc
index ae9ce02..cb77528 100644
--- a/src/arch/arm/fastmodel/GIC/gic.cc
+++ b/src/arch/arm/fastmodel/GIC/gic.cc
@@ -36,6 +36,39 @@
namespace FastModel
{
+int
+SCGIC::Terminator::countUnbound(const Initiators &inits)
+{
+ int count = 0;
+ for (auto &init: inits)
+ if (!init.get_port_base().size())
+ count++;
+ return count;
+}
+
+SCGIC::Terminator::Terminator(
+ sc_core::sc_module_name _name, Initiators &inits) :
+ sc_core::sc_module(_name),
+ targets("targets", countUnbound(inits))
+{
+ // For every unbound initiator socket, connected it to one
+ // terminator target socket.
+ int i = 0;
+ for (auto &init: inits) {
+ if (!init.get_port_base().size()) {
+ auto &term = targets.at(i++);
+ term.bind(*this);
+ term.bind(init);
+ }
+ }
+}
+
+void
+SCGIC::Terminator::sendTowardsCPU(uint8_t len, const uint8_t *data)
+{
+ panic("Call to terminated interface!");
+}
+
SCGIC::SCGIC(const SCFastModelGICParams ¶ms,
sc_core::sc_module_name _name) : scx_evs_GIC(_name)
{
@@ -257,27 +290,39 @@
set_parameter("gic.consolidators", params.consolidators);
}
+void
+SCGIC::before_end_of_elaboration()
+{
+ scx_evs_GIC::before_end_of_elaboration();
+ terminator.reset(new Terminator("terminator", redistributor));
+}
+
GIC::GIC(const FastModelGICParams ¶ms) :
BaseGic(¶ms),
ambaM(params.sc_gic->amba_m, params.name + ".amba_m", -1),
ambaS(params.sc_gic->amba_s, params.name + ".amba_s", -1),
- redistributor(params.sc_gic->redistributor,
- params.name + ".redistributor", -1),
+ redistributors(params.port_redistributor_connection_count),
scGIC(params.sc_gic)
-{
-}
+{}
Port &
GIC::getPort(const std::string &if_name, PortID idx)
{
- if (if_name == "amba_m")
+ if (if_name == "amba_m") {
return ambaM;
- else if (if_name == "amba_s")
+ } else if (if_name == "amba_s") {
return ambaS;
- else if (if_name == "redistributor")
- return redistributor;
- else
+ } else if (if_name == "redistributor") {
+ auto &ptr = redistributors.at(idx);
+ if (!ptr) {
+ ptr.reset(new TlmGicInitiator(scGIC->redistributor[idx],
+ csprintf("%s.redistributor[%d]",
+ name(), idx), idx));
+ }
+ return *ptr;
+ } else {
return BaseGic::getPort(if_name, idx);
+ }
}
void
diff --git a/src/arch/arm/fastmodel/GIC/gic.hh b/src/arch/arm/fastmodel/GIC/gic.hh
index de97f63..aadfa3a 100644
--- a/src/arch/arm/fastmodel/GIC/gic.hh
+++ b/src/arch/arm/fastmodel/GIC/gic.hh
@@ -32,6 +32,8 @@
#include <amba_pv.h>
+#include <memory>
+
#include "arch/arm/fastmodel/amba_ports.hh"
#include "dev/arm/base_gic.hh"
#include "params/FastModelGIC.hh"
@@ -50,11 +52,41 @@
// the work.
class SCGIC : public scx_evs_GIC
{
+ private:
+ // The unconnected CPU ports/sockets still need to be connected for TLM to
+ // be happy, so this module finds all unbound sockets, creates pair
+ // sockets for them to connect to, binds everything together, and
+ // implements the target interface with a dummy stub that will complain
+ // and crash gem5 if it ever gets called.
+ class Terminator : public sc_core::sc_module,
+ public svp_gicv3_comms::gicv3_comms_fw_if
+ {
+ protected:
+ typedef sc_core::sc_vector<
+ svp_gicv3_comms::gicv3_comms_initiator_socket<>> Initiators;
+ typedef sc_core::sc_vector<
+ svp_gicv3_comms::gicv3_comms_target_socket<>> Targets;
+
+ Targets targets;
+
+ static int countUnbound(const Initiators &inits);
+
+ public:
+ Terminator(sc_core::sc_module_name _name, Initiators &inits);
+
+ // Stub out the terminated interface.
+ void sendTowardsCPU(uint8_t len, const uint8_t *data) override;
+ };
+
+ std::unique_ptr<Terminator> terminator;
+
public:
SCGIC(const SCFastModelGICParams ¶ms, sc_core::sc_module_name _name);
SignalInterruptInitiatorSocket signalInterrupt;
+ void before_end_of_elaboration() override;
+
void
end_of_elaboration() override
{
@@ -77,7 +109,7 @@
AmbaInitiator ambaM;
AmbaTarget ambaS;
- TlmGicInitiator redistributor;
+ std::vector<std::unique_ptr<TlmGicInitiator>> redistributors;
SCGIC *scGIC;
diff --git a/src/arch/arm/fastmodel/common/signal_receiver.hh b/src/arch/arm/fastmodel/common/signal_receiver.hh
index c249c3a..b455982 100644
--- a/src/arch/arm/fastmodel/common/signal_receiver.hh
+++ b/src/arch/arm/fastmodel/common/signal_receiver.hh
@@ -31,6 +31,7 @@
#define __ARCH_ARM_FASTMODEL_COMMON_SIGNAL_RECEIVER_HH__
#include <amba_pv.h>
+
#include <functional>
namespace FastModel
