commit 670d080aa1669a67b30da5fad995a4377d23d77d
author Giacomo Travaglini <giacomo.travaglini@arm.com> Wed Apr 10 14:26:47 2019 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Thu Apr 25 12:48:59 2019 +0000
tree e13f74457a4a3eb68e0aac7b45fa559a679ad473
parent 40018b14a608b066a52c4baf86b4160820402c9c

arch-arm: Correct target EL field in TLBI operations

Some TLB Invalidation operations affecting the EL2 translation regime
were marked as targeting EL1 instead of EL2

Change-Id: I77821eec7a409e9df6a6814855f9a375832ffe74
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jan-Peter Larsson <jan-peter.larsson@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18388
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/isa.cc

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 42e1cba..d5d88e6 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -1219,7 +1219,7 @@
                 assert32(tc);
                 scr = readMiscReg(MISCREG_SCR, tc);
 
-                TLBIMVAA tlbiOp(EL1, haveSecurity && !scr.ns,
+                TLBIMVAA tlbiOp(EL2, haveSecurity && !scr.ns,
                                 mbits(newVal, 31,12), true);
 
                 tlbiOp(tc);
@@ -1232,7 +1232,7 @@
                 assert32(tc);
                 scr = readMiscReg(MISCREG_SCR, tc);
 
-                TLBIMVAA tlbiOp(EL1, haveSecurity && !scr.ns,
+                TLBIMVAA tlbiOp(EL2, haveSecurity && !scr.ns,
                                 mbits(newVal, 31,12), true);
 
                 tlbiOp.broadcast(tc);
@@ -1347,7 +1347,7 @@
             {
                 assert32(tc);
 
-                TLBIALLN tlbiOp(EL1, true);
+                TLBIALLN tlbiOp(EL2, true);
                 tlbiOp(tc);
                 return;
             }
@@ -1356,7 +1356,7 @@
             {
                 assert32(tc);
 
-                TLBIALLN tlbiOp(EL1, true);
+                TLBIALLN tlbiOp(EL2, true);
                 tlbiOp.broadcast(tc);
                 return;
             }