src/arch/mips/MipsCPU.py

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from m5.objects.BaseAtomicSimpleCPU import BaseAtomicSimpleCPU
from m5.objects.BaseNonCachingSimpleCPU import BaseNonCachingSimpleCPU
from m5.objects.BaseTimingSimpleCPU import BaseTimingSimpleCPU
from m5.objects.BaseO3CPU import BaseO3CPU
from m5.objects.MipsDecoder import MipsDecoder
from m5.objects.MipsMMU import MipsMMU
from m5.objects.MipsInterrupts import MipsInterrupts
from m5.objects.MipsISA import MipsISA

class MipsCPU:
    ArchDecoder = MipsDecoder
    ArchMMU = MipsMMU
    ArchInterrupts = MipsInterrupts
    ArchISA = MipsISA

class MipsAtomicSimpleCPU(BaseAtomicSimpleCPU, MipsCPU):
    mmu = MipsMMU()

class MipsNonCachingSimpleCPU(BaseNonCachingSimpleCPU, MipsCPU):
    mmu = MipsMMU()

class MipsTimingSimpleCPU(BaseTimingSimpleCPU, MipsCPU):
    mmu = MipsMMU()

class MipsO3CPU(BaseO3CPU, MipsCPU):
    mmu = MipsMMU()