commit 6e182b025de65c4e0d7cd767f33e4da5b66b24af
author Bobby R. Bruce <bbruce@ucdavis.edu> Wed Oct 05 11:04:44 2022 -0700
committer Bobby Bruce <bbruce@ucdavis.edu> Mon Oct 10 17:24:03 2022 +0000
tree da12c00431c07955a130f53798963564d0b49f53
parent abad2d6532bee2038c612bb18fafcfd47f17fcd9

mem-ruby: Fix clang-14 compilation warning "use of bitwise"

Clang Version 14 throws a warning "use of bitwise '&/|' with boolean
operands" for cases where bitwise operations are used where boolean
operations are intended.

This occurred in "WriteMast.hh", "data.isa", and "decode.cc" where
boolean values were being compared using the bitwise operands. While
bitwise operations are equivalent, they have been changed to boolean
operations in this patch to avoid the clang-14 warning.

Change-Id: Ic7583e13a325661712c75c8e1b234c4878832352
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64172
Reviewed-by: Tom Rollet <tom.rollet@huawei.com>
Reviewed-by: Kunal Pai <kunpai@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/isa/insts/data.isa

diff --git a/src/arch/arm/isa/insts/data.isa b/src/arch/arm/isa/insts/data.isa
index 9a14d97..066a2ab 100644
--- a/src/arch/arm/isa/insts/data.isa
+++ b/src/arch/arm/isa/insts/data.isa
@@ -342,7 +342,7 @@
         ''', flagType="none", buildCc=False)
     buildRegDataInst("qdadd", '''
             int32_t midRes;
-            resTemp = saturateOp<32>(midRes, Op2_sw, Op2_sw) |
+            resTemp = saturateOp<32>(midRes, Op2_sw, Op2_sw) ||
                       saturateOp<32>(midRes, Op1_sw, midRes);
             Dest = midRes;
         ''', flagType="saturate", buildNonCc=False)
@@ -377,7 +377,7 @@
         ''', flagType="none", buildCc=False)
     buildRegDataInst("qdsub", '''
             int32_t midRes;
-            resTemp = saturateOp<32>(midRes, Op2_sw, Op2_sw) |
+            resTemp = saturateOp<32>(midRes, Op2_sw, Op2_sw) ||
                       saturateOp<32>(midRes, Op1_sw, midRes, true);
             Dest = midRes;
         ''', flagType="saturate", buildNonCc=False)

src/cpu/o3/decode.cc

diff --git a/src/cpu/o3/decode.cc b/src/cpu/o3/decode.cc
index 6b709ce..9555e32 100644
--- a/src/cpu/o3/decode.cc
+++ b/src/cpu/o3/decode.cc
@@ -300,7 +300,7 @@
     // Using PCState::branching()  will send execution on the
     // fallthrough and this will not be caught at execution (since
     // branch was correctly predicted taken)
-    toFetch->decodeInfo[tid].branchTaken = inst->readPredTaken() |
+    toFetch->decodeInfo[tid].branchTaken = inst->readPredTaken() ||
                                            inst->isUncondCtrl();
 
     toFetch->decodeInfo[tid].squashInst = inst;

src/mem/ruby/common/WriteMask.hh

diff --git a/src/mem/ruby/common/WriteMask.hh b/src/mem/ruby/common/WriteMask.hh
index bb8c337..2de21da 100644
--- a/src/mem/ruby/common/WriteMask.hh
+++ b/src/mem/ruby/common/WriteMask.hh
@@ -170,7 +170,7 @@
     {
         assert(mSize == writeMask.mSize);
         for (int i = 0; i < mSize; i++) {
-            mMask[i] = (mMask.at(i)) & (writeMask.mMask.at(i));
+            mMask[i] = (mMask.at(i)) && (writeMask.mMask.at(i));
         }
 
         if (writeMask.mAtomic) {
@@ -184,7 +184,7 @@
     {
         assert(mSize == writeMask.mSize);
         for (int i = 0; i < mSize; i++) {
-            mMask[i] = (mMask.at(i)) | (writeMask.mMask.at(i));
+            mMask[i] = (mMask.at(i)) || (writeMask.mMask.at(i));
         }
 
         if (writeMask.mAtomic) {