configs-arm: enable PMU instantiation in CpuCluster
This patch adds a new method to the CpuCluster object
which allows passing the PMU interrupt numbers and events
to record for each core.
This lets users create CPU clusters with PMUs.
Change-Id: Id49fd0aee50f49e4c6fca95e4ee673da3dca73cd
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22848
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py
index 4615daa..02b9bd7 100644
--- a/configs/example/arm/devices.py
+++ b/configs/example/arm/devices.py
@@ -159,6 +159,31 @@
cpu.connectAllPorts(self.toL2Bus)
self.toL2Bus.master = self.l2.cpu_side
+ def addPMUs(self, ints, events=[]):
+ """
+ Instantiates 1 ArmPMU per PE. The method is accepting a list of
+ interrupt numbers (ints) used by the PMU and a list of events to
+ register in it.
+
+ :param ints: List of interrupt numbers. The code will iterate over
+ the cpu list in order and will assign to every cpu in the cluster
+ a PMU with the matching interrupt.
+ :type ints: List[int]
+ :param events: Additional events to be measured by the PMUs
+ :type events: List[Union[ProbeEvent, SoftwareIncrement]]
+ """
+ assert len(ints) == len(self.cpus)
+ for cpu, pint in zip(self.cpus, ints):
+ int_cls = ArmPPI if pint < 32 else ArmSPI
+ for isa in cpu.isa:
+ isa.pmu = ArmPMU(interrupt=int_cls(num=pint))
+ isa.pmu.addArchEvents(cpu=cpu, itb=cpu.itb, dtb=cpu.dtb,
+ icache=getattr(cpu, 'icache', None),
+ dcache=getattr(cpu, 'dcache', None),
+ l2cache=getattr(self, 'l2', None))
+ for ev in events:
+ isa.pmu.addEvent(ev)
+
def connectMemSide(self, bus):
bus.slave
try:
