arch-power: Add clone support

This adds support for the clone() system call using
which multiple cpus can be utilized in SE mode. For
this change, it should be noted that Linux on Power
uses the CLONE_BACKWARDS argument order.

Change-Id: Iac91a7d110d9f7a133b8e102ac113f48a431a0d6
Signed-off-by: Kevin Joe <0keik0de@gmail.com>
Signed-off-by: Chetan Agarwal <chetanag35@gmail.com>
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47579
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/power/linux/linux.hh b/src/arch/power/linux/linux.hh
index cdb1cda..646d642 100644
--- a/src/arch/power/linux/linux.hh
+++ b/src/arch/power/linux/linux.hh
@@ -32,6 +32,9 @@
 
 #include <map>
 
+#include "arch/power/isa.hh"
+#include "arch/power/regs/int.hh"
+#include "cpu/thread_context.hh"
 #include "kern/linux/linux.hh"
 
 namespace gem5
@@ -214,6 +217,21 @@
             return false;
         }
     }
+
+    static void
+    archClone(uint64_t flags,
+              Process *pp, Process *cp,
+              ThreadContext *ptc, ThreadContext *ctc,
+              uint64_t stack, uint64_t tls)
+    {
+        ctc->getIsaPtr()->copyRegsFrom(ptc);
+
+        if (flags & TGT_CLONE_SETTLS)
+            ctc->setIntReg(PowerISA::ThreadPointerReg, tls);
+
+        if (stack)
+            ctc->setIntReg(PowerISA::StackPointerReg, stack);
+    }
 };
 
 } // namespace gem5
diff --git a/src/arch/power/linux/se_workload.cc b/src/arch/power/linux/se_workload.cc
index 9d5f9de..b49cb0b 100644
--- a/src/arch/power/linux/se_workload.cc
+++ b/src/arch/power/linux/se_workload.cc
@@ -227,7 +227,7 @@
     { 117, "ipc" },
     { 118, "fsync" },
     { 119, "sigreturn" },
-    { 120, "clone" },
+    { 120, "clone", cloneBackwardsFunc<PowerLinux> },
     { 121, "setdomainname" },
     { 122, "uname", unameFunc },
     { 123, "modify_ldt" },
diff --git a/src/arch/power/regs/int.hh b/src/arch/power/regs/int.hh
index 891eaa1..95fbb8a 100644
--- a/src/arch/power/regs/int.hh
+++ b/src/arch/power/regs/int.hh
@@ -55,6 +55,7 @@
 const int ArgumentReg5 = 8;
 const int StackPointerReg = 1;
 const int TOCPointerReg = 2;
+const int ThreadPointerReg = 13;
 
 enum MiscIntRegNums
 {