src/arch/x86/isa/microops/specop.isa

// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
// Copyright (c) 2011 Mark D. Hill and David A. Wood
// All rights reserved.
//
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//////////////////////////////////////////////////////////////////////////
//
// Fault Microop
//
//////////////////////////////////////////////////////////////////////////

def template MicroFaultDeclare {{
    class %(class_name)s : public %(base_class)s
    {
      private:
        %(reg_idx_arr_decl)s;

      public:
        %(class_name)s(ExtMachInst mach_inst, const char *inst_mnem,
                uint64_t set_flags, Fault _fault, uint8_t _cc);

        Fault execute(ExecContext *, Trace::InstRecord *) const override;
    };
}};

def template MicroFaultExecute {{
    Fault
    %(class_name)s::execute(ExecContext *xc,
            Trace::InstRecord *traceData) const
    {
        %(op_decl)s;
        %(op_rd)s;
        if (%(cond_test)s) {
            // Return the fault we were constructed with.
            return fault;
        } else {
            return NoFault;
        }
    }
}};

def template MicroFaultConstructor {{
    %(class_name)s::%(class_name)s(
            ExtMachInst mach_inst, const char *inst_mnem, uint64_t set_flags,
            Fault _fault, uint8_t _cc) :
        %(base_class)s(mach_inst, "fault", inst_mnem, set_flags, No_OpClass,
                { _fault }, _cc)
    {
        %(set_reg_idx_arr)s;
        %(constructor)s;
    }
}};

let {{
    class Fault(X86Microop):
        className = "MicroFault"
        def __init__(self, fault, flags=None):
            self.fault = fault
            if flags:
                if not isinstance(flags, (list, tuple)):
                    raise Exception("flags must be a list or tuple of flags")
                self.cond = " | ".join(flags)
                self.className += "Flags"
            else:
                self.cond = "0"

        def getAllocator(self, microFlags):
            allocator = '''new %(class_name)s(machInst, macrocodeBlock,
                    %(flags)s, %(fault)s, %(cc)s)''' % {
                "class_name" : self.className,
                "flags" : self.microFlagsText(microFlags),
                "fault" : self.fault,
                "cc" : self.cond}
            return allocator

    iop = InstObjParams("fault", "MicroFaultFlags",
            "X86ISA::InstOperands<X86ISA::MicroCondBase, X86ISA::FaultOp>",
            {"code": "",
             "cond_test": "checkCondition(ccFlagBits | cfofBits | dfBit | \
                                          ecfBit | ezfBit, cc)"})
    exec_output = MicroFaultExecute.subst(iop)
    header_output = MicroFaultDeclare.subst(iop)
    decoder_output = MicroFaultConstructor.subst(iop)
    iop = InstObjParams("fault", "MicroFault",
            "X86ISA::InstOperands<X86ISA::MicroCondBase, X86ISA::FaultOp>",
            {"code": "",
             "cond_test": "true"})
    exec_output += MicroFaultExecute.subst(iop)
    header_output += MicroFaultDeclare.subst(iop)
    decoder_output += MicroFaultConstructor.subst(iop)
    microopClasses["fault"] = Fault

    class Halt(X86Microop):
        className = "MicroHalt"
        def __init__(self):
            pass

        def getAllocator(self, microFlags):
            return "new X86ISA::MicroHalt(machInst, macrocodeBlock, %s)" % \
                    self.microFlagsText(microFlags)

    microopClasses["halt"] = Halt
}};

def template MicroFenceOpDeclare {{
    class %(class_name)s : public X86ISA::X86MicroopBase
    {
      private:
        %(reg_idx_arr_decl)s;

      public:
        %(class_name)s(ExtMachInst mach_inst, const char *inst_mnem,
                uint64_t set_flags);

        Fault
        execute(ExecContext *, Trace::InstRecord *) const override
        {
            return NoFault;
        }
    };
}};

def template MicroFenceOpConstructor {{
    %(class_name)s::%(class_name)s(
            ExtMachInst mach_inst, const char *inst_mnem, uint64_t set_flags) :
        %(base_class)s(mach_inst, "%(mnemonic)s", inst_mnem,
                set_flags, %(op_class)s)
    {
        %(set_reg_idx_arr)s;
        %(constructor)s;
    }
}};

let {{
    class MfenceOp(X86Microop):
        def __init__(self):
            self.className = "Mfence"
            self.mnemonic = "mfence"
            self.instFlags = "| (1ULL << StaticInst::IsReadBarrier)" + \
                             "| (1ULL << StaticInst::IsWriteBarrier)"

        def getAllocator(self, microFlags):
            allocString = '''
                    (StaticInstPtr)(new %(class_name)s(machInst,
                        macrocodeBlock, %(flags)s))
            '''
            allocator = allocString % {
                "class_name" : self.className,
                "mnemonic" : self.mnemonic,
                "flags" : self.microFlagsText(microFlags) + self.instFlags}
            return allocator

    microopClasses["mfence"] = MfenceOp
}};

let {{
    # Build up the all register version of this micro op
    iop = InstObjParams("mfence", "Mfence", 'X86MicroopBase',
            {"code" : ""})
    header_output += MicroFenceOpDeclare.subst(iop)
    decoder_output += MicroFenceOpConstructor.subst(iop)
}};