src/arch/mips/isa/base.isa

// -*- mode:c++ -*-

// Copyright (c) 2007 MIPS Technologies, Inc.
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are
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// redistributions in binary form must reproduce the above copyright
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//
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////////////////////////////////////////////////////////////////////
//
// Base class for MIPS instructions, and some support functions
//

//Outputs to decoder.hh
output header {{

    using namespace MipsISA;

    /**
     * Base class for all MIPS static instructions.
     */
    class MipsStaticInst : public StaticInst
    {
      protected:

        // Constructor
        MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
            : StaticInst(mnem, _machInst, __opClass)
        {
        }

        /// Print a register name for disassembly given the unique
        /// dependence tag number (FP or int).
        void printReg(std::ostream &os, RegId reg) const;

        std::string generateDisassembly(
                Addr pc, const Loader::SymbolTable *symtab) const override;

      public:
        void
        advancePC(MipsISA::PCState &pc) const override
        {
            pc.advance();
        }

        size_t
        asBytes(void *buf, size_t max_size) override
        {
            return simpleAsBytes(buf, max_size, machInst);
        }
    };

}};

//Ouputs to decoder.cc
output decoder {{

    void
    MipsStaticInst::printReg(std::ostream &os, RegId reg) const
    {
        if (reg.isIntReg()) {
            ccprintf(os, "r%d", reg.index());
        } else {
            ccprintf(os, "f%d", reg.index());
        }
    }

    std::string
    MipsStaticInst::generateDisassembly(
            Addr pc, const Loader::SymbolTable *symtab) const
    {
        std::stringstream ss;

        ccprintf(ss, "%-10s ", mnemonic);

        // Need to find standard way to not print
        // this info. Maybe add bool variable to
        // class?
        if (strcmp(mnemonic, "syscall") != 0) {
            if(_numDestRegs > 0){
                printReg(ss, _destRegIdx[0]);
            }

            if(_numSrcRegs > 0) {
                ss << ", ";
                printReg(ss, _srcRegIdx[0]);
            }

            if(_numSrcRegs > 1) {
                ss << ", ";
                printReg(ss, _srcRegIdx[1]);
            }
        }

        // Should we define a separate inst. class
        // just for two insts?
        if (strcmp(mnemonic, "sll") == 0 || strcmp(mnemonic, "sra") == 0) {
            ccprintf(ss,", %d",SA);
        }

        return ss.str();
    }

}};