dev-arm: Implement invalidateASID in SMMUv3 WalkCache
This patch fixes a bug where issuing a invalidate-by-ASID command
(CMD_TLBI_NH_ASID) to the SMMU would cause Gem5 to crash.
Change-Id: I5b8343a17e43762fe3917560ae401a20be1e05b8
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20259
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/dev/arm/smmu_v3_caches.cc b/src/dev/arm/smmu_v3_caches.cc
index d92c544..f6384b4 100644
--- a/src/dev/arm/smmu_v3_caches.cc
+++ b/src/dev/arm/smmu_v3_caches.cc
@@ -1122,7 +1122,16 @@
void
WalkCache::invalidateASID(uint16_t asid, uint16_t vmid)
{
- panic("%s unimplemented\n", __func__);
+ for (size_t s = 0; s < sets.size(); s++) {
+ Set &set = sets[s];
+
+ for (size_t i = 0; i < set.size(); i++) {
+ Entry &e = set[i];
+
+ if (e.asid==asid && e.vmid==vmid)
+ e.valid = false;
+ }
+ }
}
void
