arch: Decentralize the arch tag TagImplies in arch/SConscript.

Put the TagImplies for each ISA in its own SConscript.

Change-Id: I90d72aa6f493ac2c27ec54e3ac02ff8151e2f518

src/arch/SConscript

diff --git a/src/arch/SConscript b/src/arch/SConscript
index 92a0618..90d7ad7 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -57,25 +57,18 @@
 #################################################################
 
 if env['CONF']['USE_ARM_ISA']:
-    env.TagImplies('arm isa', 'gem5 lib')
     isa = 'arm'
 elif env['CONF']['USE_MIPS_ISA']:
-    env.TagImplies('mips isa', 'gem5 lib')
     isa = 'mips'
 elif env['CONF']['USE_POWER_ISA']:
-    env.TagImplies('power isa', 'gem5 lib')
     isa = 'power'
 elif env['CONF']['USE_RISCV_ISA']:
-    env.TagImplies('riscv isa', 'gem5 lib')
     isa = 'riscv'
 elif env['CONF']['USE_SPARC_ISA']:
-    env.TagImplies('sparc isa', 'gem5 lib')
     isa = 'sparc'
 elif env['CONF']['USE_X86_ISA']:
-    env.TagImplies('x86 isa', 'gem5 lib')
     isa = 'x86'
 elif env['CONF']['USE_NULL_ISA']:
-    env.TagImplies('null isa', 'gem5 lib')
     isa = 'null'
 
 amdgpu_isa = ['gcn3', 'vega']

src/arch/arm/SConscript

diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index d90a843..5d27cee 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -40,12 +40,15 @@
 
 Import('*')
 
+if env['USE_ARM_ISA']:
+    env.TagImplies('arm isa', 'gem5 lib')
+
 # The GTest function does not have a 'tags' parameter. We therefore apply this
 # guard to ensure this test is only built when ARM is compiled.
 #
 # Note: This will need reconfigured for multi-isa. E.g., if this is
 # incorporated: https://gem5-review.googlesource.com/c/public/gem5/+/52491
-if env['TARGET_ISA'] == 'arm':
+if env['USE_ARM_ISA']:
     GTest('aapcs64.test', 'aapcs64.test.cc', '../../base/debug.cc',
             '../../cpu/reg_class.cc', '../../sim/bufval.cc')
 Source('decoder.cc', tags='arm isa')

src/arch/mips/SConscript

diff --git a/src/arch/mips/SConscript b/src/arch/mips/SConscript
index 5dc294f..3ef9dec 100644
--- a/src/arch/mips/SConscript
+++ b/src/arch/mips/SConscript
@@ -29,6 +29,9 @@
 
 Import('*')
 
+if env['USE_MIPS_ISA']:
+    env.TagImplies('mips isa', 'gem5 lib')
+
 Source('decoder.cc', tags='mips isa')
 Source('dsp.cc', tags='mips isa')
 Source('faults.cc', tags='mips isa')

src/arch/power/SConscript

diff --git a/src/arch/power/SConscript b/src/arch/power/SConscript
index a848572..8ddb966 100644
--- a/src/arch/power/SConscript
+++ b/src/arch/power/SConscript
@@ -30,6 +30,9 @@
 
 Import('*')
 
+if env['USE_POWER_ISA']:
+    env.TagImplies('power isa', 'gem5 lib')
+
 Source('decoder.cc', tags='power isa')
 Source('faults.cc', tags='power isa')
 Source('insts/branch.cc', tags='power isa')

src/arch/riscv/SConscript

diff --git a/src/arch/riscv/SConscript b/src/arch/riscv/SConscript
index b51e44d..dd4e9ae 100644
--- a/src/arch/riscv/SConscript
+++ b/src/arch/riscv/SConscript
@@ -43,6 +43,9 @@
 
 Import('*')
 
+if env['USE_RISCV_ISA']:
+    env.TagImplies('riscv isa', 'gem5 lib')
+
 Source('decoder.cc', tags='riscv isa')
 Source('faults.cc', tags='riscv isa')
 Source('isa.cc', tags='riscv isa')

src/arch/sparc/SConscript

diff --git a/src/arch/sparc/SConscript b/src/arch/sparc/SConscript
index 499b5e1..a721c4a 100644
--- a/src/arch/sparc/SConscript
+++ b/src/arch/sparc/SConscript
@@ -28,6 +28,9 @@
 
 Import('*')
 
+if env['USE_SPARC_ISA']:
+    env.TagImplies('sparc isa', 'gem5 lib')
+
 Source('asi.cc', tags='sparc isa')
 Source('decoder.cc', tags='sparc isa')
 Source('faults.cc', tags='sparc isa')

src/arch/x86/SConscript

diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript
index 335c70f..97c34f5 100644
--- a/src/arch/x86/SConscript
+++ b/src/arch/x86/SConscript
@@ -40,6 +40,9 @@
 
 Import('*')
 
+if env['USE_X86_ISA']:
+    env.TagImplies('x86 isa', 'gem5 lib')
+
 Source('cpuid.cc', tags='x86 isa')
 Source('decoder.cc', tags='x86 isa')
 Source('decoder_tables.cc', tags='x86 isa')