commit | ad7e297fba45c6546dfad4e584046bdb56f62123 | [log] [tgz] |
---|---|---|
author | Nadia Etemadi <netemadi@ucdavis.edu> | Thu May 21 15:06:01 2020 -0700 |
committer | Bobby R. Bruce <bbruce@ucdavis.edu> | Sat May 23 01:24:41 2020 +0000 |
tree | d9b1dc9e17271322a9c243da5a3f5c36164b443d | |
parent | 51600749cc4e3215ebfefb12895bca02ce52197e [diff] |
arch-arm: Fixed issue building ARM_MESI_Three_Level Change-Id: I1ef200cd282e189d142a5902b6ddbd33119c4173 Jira: https://gem5.atlassian.net/browse/GEM5-594 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29352 Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
diff --git a/build_opts/ARM_MESI_Three_Level b/build_opts/ARM_MESI_Three_Level index 1836fb0..29a429c 100644 --- a/build_opts/ARM_MESI_Three_Level +++ b/build_opts/ARM_MESI_Three_Level
@@ -2,5 +2,5 @@ # All rights reserved. TARGET_ISA = 'arm' -CPU_MODELS = 'TimingSimpleCPU, O3CPU' +CPU_MODELS = 'TimingSimpleCPU,O3CPU' PROTOCOL = 'MESI_Three_Level'