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# Copyright (c) 2021 ARM Limited
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#
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# 2x4 mesh definition
#
# 0 --- 1 --- 2 --- 3
# | | | |
# 4 --- 5 --- 6 --- 7
#
mesh:
num_rows : 2
num_cols : 4
router_latency : 1
link_latency : 1
# Bindings for each CHI node type.
CHI_RNF:
# Uncomment to map num_nodes_per_router RNFs in each provided router,
# assuming num. created CHI_RNFs == len(router_list)*num_nodes_per_router
# num_nodes_per_router: 1
router_list: [1, 2, 5, 6]
CHI_HNF:
# num_nodes_per_router: 1
router_list: [1, 2, 5, 6]
CHI_SNF_MainMem:
# num_nodes_per_router: 1
router_list: [0, 4]
# Applies to CHI_SNF_BootMem and possibly other non-main memories
CHI_SNF_IO:
router_list: [3]
# Applies to CHI_RNI_DMA and CHI_RNI_IO
CHI_RNI_IO:
router_list: [7]