| // -*- mode:c++ -*- |
| |
| // Copyright (c) 2010-2011 ARM Limited |
| // All rights reserved |
| // |
| // The license below extends only to copyright in the software and shall |
| // not be construed as granting a license to any other intellectual |
| // property including but not limited to intellectual property relating |
| // to a hardware implementation of the functionality of the software |
| // licensed hereunder. You may use the software subject to the license |
| // terms below provided that you ensure that this notice is replicated |
| // unmodified and in its entirety in all distributions of the software, |
| // modified or unmodified, in source code or in binary form. |
| // |
| // Redistribution and use in source and binary forms, with or without |
| // modification, are permitted provided that the following conditions are |
| // met: redistributions of source code must retain the above copyright |
| // notice, this list of conditions and the following disclaimer; |
| // redistributions in binary form must reproduce the above copyright |
| // notice, this list of conditions and the following disclaimer in the |
| // documentation and/or other materials provided with the distribution; |
| // neither the name of the copyright holders nor the names of its |
| // contributors may be used to endorse or promote products derived from |
| // this software without specific prior written permission. |
| // |
| // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| // |
| // Authors: Gabe Black |
| |
| let {{ |
| |
| header_output = decoder_output = exec_output = "" |
| |
| class SwapInst(LoadStoreInst): |
| execBase = 'Swap' |
| decConstBase = 'Swap' |
| |
| def __init__(self, name, Name, eaCode, |
| preAccCode, postAccCode, memFlags, instFlags = []): |
| super(SwapInst, self).__init__() |
| self.name = name |
| self.Name = Name |
| self.eaCode = eaCode |
| self.preAccCode = preAccCode |
| self.postAccCode = postAccCode |
| self.memFlags = memFlags |
| self.instFlags = instFlags |
| |
| def emit(self): |
| global header_output, decoder_output, exec_output |
| codeBlobs = { "ea_code": self.eaCode, |
| "preacc_code": self.preAccCode, |
| "postacc_code": self.postAccCode } |
| codeBlobs["predicate_test"] = pickPredicate(codeBlobs) |
| (newHeader, |
| newDecoder, |
| newExec) = self.fillTemplates(self.name, self.Name, codeBlobs, |
| self.memFlags, self.instFlags, |
| base = 'Swap') |
| header_output += newHeader |
| decoder_output += newDecoder |
| exec_output += newExec |
| |
| swpPreAccCode = ''' |
| if (!((SCTLR)Sctlr).sw) { |
| return std::make_shared<UndefinedInstruction>(machInst, false, |
| mnemonic); |
| } |
| ''' |
| |
| SwapInst('swp', 'Swp', 'EA = Base;', |
| swpPreAccCode + 'Mem = cSwap(Op1_uw, ((CPSR)Cpsr).e);', |
| 'Dest = cSwap((uint32_t)memData, ((CPSR)Cpsr).e);', |
| ['Request::MEM_SWAP', |
| 'ArmISA::TLB::AlignWord', |
| 'ArmISA::TLB::MustBeOne'], |
| ['IsStoreConditional']).emit() |
| |
| SwapInst('swpb', 'Swpb', 'EA = Base;', |
| swpPreAccCode + 'Mem_ub = cSwap(Op1_ub, ((CPSR)Cpsr).e);', |
| 'Dest_ub = cSwap((uint8_t)memData, ((CPSR)Cpsr).e);', |
| ['Request::MEM_SWAP', |
| 'ArmISA::TLB::AlignByte', |
| 'ArmISA::TLB::MustBeOne'], |
| ['IsStoreConditional']).emit() |
| }}; |
