commit b299740e655cb64d630aa72934dc47375f68910c
author Chuan Zhu <chuan.zhu@arm.com> Mon Jan 15 22:38:06 2018 +0000
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Wed Apr 18 14:42:33 2018 +0000
tree 32653cbbce610f23abe0429c26fa7c2276f615bb
parent 1c31181958b53971f5940b80678fa4646ddb6c12

arch-arm: Fix FPEXC32_EL2 to FPEXC mapping

The mapping between MISCREG_FPEXC32_EL2 and MISCREG_FPEXC was
missing, this patch adds the mapping.

Change-Id: I2e7fa0456b73662ff9f950deb5c7e648a1bdd9ca
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10043
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/arch/arm/miscregs.cc

diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index 81ce43e..b5ae4ce 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010-2013, 2015-2017 ARM Limited
+ * Copyright (c) 2010-2013, 2015-2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -3601,7 +3601,7 @@
       .hyp().mon()
       .mapsTo(MISCREG_HSR);
     InitReg(MISCREG_FPEXC32_EL2)
-      .hyp().mon();
+      .hyp().mon().mapsTo(MISCREG_FPEXC);
     InitReg(MISCREG_AFSR0_EL3)
       .mon();
     InitReg(MISCREG_AFSR1_EL3)