| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000027 |
| sim_ticks 27117500 |
| final_tick 27117500 |
| sim_freq 1000000000000 |
| host_inst_rate 121145 |
| host_op_rate 121128 |
| host_tick_rate 257188425 |
| host_mem_usage 265776 |
| host_seconds 0.11 |
| sim_insts 12770 |
| sim_ops 12770 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.physmem.bytes_read::cpu.inst 39680 |
| system.physmem.bytes_read::cpu.data 21888 |
| system.physmem.bytes_read::total 61568 |
| system.physmem.bytes_inst_read::cpu.inst 39680 |
| system.physmem.bytes_inst_read::total 39680 |
| system.physmem.num_reads::cpu.inst 620 |
| system.physmem.num_reads::cpu.data 342 |
| system.physmem.num_reads::total 962 |
| system.physmem.bw_read::cpu.inst 1463261731 |
| system.physmem.bw_read::cpu.data 807154052 |
| system.physmem.bw_read::total 2270415783 |
| system.physmem.bw_inst_read::cpu.inst 1463261731 |
| system.physmem.bw_inst_read::total 1463261731 |
| system.physmem.bw_total::cpu.inst 1463261731 |
| system.physmem.bw_total::cpu.data 807154052 |
| system.physmem.bw_total::total 2270415783 |
| system.physmem.readReqs 963 |
| system.physmem.writeReqs 0 |
| system.physmem.readBursts 963 |
| system.physmem.writeBursts 0 |
| system.physmem.bytesReadDRAM 61632 |
| system.physmem.bytesReadWrQ 0 |
| system.physmem.bytesWritten 0 |
| system.physmem.bytesReadSys 61632 |
| system.physmem.bytesWrittenSys 0 |
| system.physmem.servicedByWrQ 0 |
| system.physmem.mergedWrBursts 0 |
| system.physmem.neitherReadNorWriteReqs 0 |
| system.physmem.perBankRdBursts::0 82 |
| system.physmem.perBankRdBursts::1 150 |
| system.physmem.perBankRdBursts::2 77 |
| system.physmem.perBankRdBursts::3 59 |
| system.physmem.perBankRdBursts::4 88 |
| system.physmem.perBankRdBursts::5 45 |
| system.physmem.perBankRdBursts::6 32 |
| system.physmem.perBankRdBursts::7 50 |
| system.physmem.perBankRdBursts::8 42 |
| system.physmem.perBankRdBursts::9 38 |
| system.physmem.perBankRdBursts::10 28 |
| system.physmem.perBankRdBursts::11 33 |
| system.physmem.perBankRdBursts::12 15 |
| system.physmem.perBankRdBursts::13 120 |
| system.physmem.perBankRdBursts::14 67 |
| system.physmem.perBankRdBursts::15 37 |
| system.physmem.perBankWrBursts::0 0 |
| system.physmem.perBankWrBursts::1 0 |
| system.physmem.perBankWrBursts::2 0 |
| system.physmem.perBankWrBursts::3 0 |
| system.physmem.perBankWrBursts::4 0 |
| system.physmem.perBankWrBursts::5 0 |
| system.physmem.perBankWrBursts::6 0 |
| system.physmem.perBankWrBursts::7 0 |
| system.physmem.perBankWrBursts::8 0 |
| system.physmem.perBankWrBursts::9 0 |
| system.physmem.perBankWrBursts::10 0 |
| system.physmem.perBankWrBursts::11 0 |
| system.physmem.perBankWrBursts::12 0 |
| system.physmem.perBankWrBursts::13 0 |
| system.physmem.perBankWrBursts::14 0 |
| system.physmem.perBankWrBursts::15 0 |
| system.physmem.numRdRetry 0 |
| system.physmem.numWrRetry 0 |
| system.physmem.totGap 27086500 |
| system.physmem.readPktSize::0 0 |
| system.physmem.readPktSize::1 0 |
| system.physmem.readPktSize::2 0 |
| system.physmem.readPktSize::3 0 |
| system.physmem.readPktSize::4 0 |
| system.physmem.readPktSize::5 0 |
| system.physmem.readPktSize::6 963 |
| system.physmem.writePktSize::0 0 |
| system.physmem.writePktSize::1 0 |
| system.physmem.writePktSize::2 0 |
| system.physmem.writePktSize::3 0 |
| system.physmem.writePktSize::4 0 |
| system.physmem.writePktSize::5 0 |
| system.physmem.writePktSize::6 0 |
| system.physmem.rdQLenPdf::0 329 |
| system.physmem.rdQLenPdf::1 321 |
| system.physmem.rdQLenPdf::2 178 |
| system.physmem.rdQLenPdf::3 95 |
| system.physmem.rdQLenPdf::4 35 |
| system.physmem.rdQLenPdf::5 5 |
| system.physmem.rdQLenPdf::6 0 |
| system.physmem.rdQLenPdf::7 0 |
| system.physmem.rdQLenPdf::8 0 |
| system.physmem.rdQLenPdf::9 0 |
| system.physmem.rdQLenPdf::10 0 |
| system.physmem.rdQLenPdf::11 0 |
| system.physmem.rdQLenPdf::12 0 |
| system.physmem.rdQLenPdf::13 0 |
| system.physmem.rdQLenPdf::14 0 |
| system.physmem.rdQLenPdf::15 0 |
| system.physmem.rdQLenPdf::16 0 |
| system.physmem.rdQLenPdf::17 0 |
| system.physmem.rdQLenPdf::18 0 |
| system.physmem.rdQLenPdf::19 0 |
| system.physmem.rdQLenPdf::20 0 |
| system.physmem.rdQLenPdf::21 0 |
| system.physmem.rdQLenPdf::22 0 |
| system.physmem.rdQLenPdf::23 0 |
| system.physmem.rdQLenPdf::24 0 |
| system.physmem.rdQLenPdf::25 0 |
| system.physmem.rdQLenPdf::26 0 |
| system.physmem.rdQLenPdf::27 0 |
| system.physmem.rdQLenPdf::28 0 |
| system.physmem.rdQLenPdf::29 0 |
| system.physmem.rdQLenPdf::30 0 |
| system.physmem.rdQLenPdf::31 0 |
| system.physmem.wrQLenPdf::0 0 |
| system.physmem.wrQLenPdf::1 0 |
| system.physmem.wrQLenPdf::2 0 |
| system.physmem.wrQLenPdf::3 0 |
| system.physmem.wrQLenPdf::4 0 |
| system.physmem.wrQLenPdf::5 0 |
| system.physmem.wrQLenPdf::6 0 |
| system.physmem.wrQLenPdf::7 0 |
| system.physmem.wrQLenPdf::8 0 |
| system.physmem.wrQLenPdf::9 0 |
| system.physmem.wrQLenPdf::10 0 |
| system.physmem.wrQLenPdf::11 0 |
| system.physmem.wrQLenPdf::12 0 |
| system.physmem.wrQLenPdf::13 0 |
| system.physmem.wrQLenPdf::14 0 |
| system.physmem.wrQLenPdf::15 0 |
| system.physmem.wrQLenPdf::16 0 |
| system.physmem.wrQLenPdf::17 0 |
| system.physmem.wrQLenPdf::18 0 |
| system.physmem.wrQLenPdf::19 0 |
| system.physmem.wrQLenPdf::20 0 |
| system.physmem.wrQLenPdf::21 0 |
| system.physmem.wrQLenPdf::22 0 |
| system.physmem.wrQLenPdf::23 0 |
| system.physmem.wrQLenPdf::24 0 |
| system.physmem.wrQLenPdf::25 0 |
| system.physmem.wrQLenPdf::26 0 |
| system.physmem.wrQLenPdf::27 0 |
| system.physmem.wrQLenPdf::28 0 |
| system.physmem.wrQLenPdf::29 0 |
| system.physmem.wrQLenPdf::30 0 |
| system.physmem.wrQLenPdf::31 0 |
| system.physmem.wrQLenPdf::32 0 |
| system.physmem.wrQLenPdf::33 0 |
| system.physmem.wrQLenPdf::34 0 |
| system.physmem.wrQLenPdf::35 0 |
| system.physmem.wrQLenPdf::36 0 |
| system.physmem.wrQLenPdf::37 0 |
| system.physmem.wrQLenPdf::38 0 |
| system.physmem.wrQLenPdf::39 0 |
| system.physmem.wrQLenPdf::40 0 |
| system.physmem.wrQLenPdf::41 0 |
| system.physmem.wrQLenPdf::42 0 |
| system.physmem.wrQLenPdf::43 0 |
| system.physmem.wrQLenPdf::44 0 |
| system.physmem.wrQLenPdf::45 0 |
| system.physmem.wrQLenPdf::46 0 |
| system.physmem.wrQLenPdf::47 0 |
| system.physmem.wrQLenPdf::48 0 |
| system.physmem.wrQLenPdf::49 0 |
| system.physmem.wrQLenPdf::50 0 |
| system.physmem.wrQLenPdf::51 0 |
| system.physmem.wrQLenPdf::52 0 |
| system.physmem.wrQLenPdf::53 0 |
| system.physmem.wrQLenPdf::54 0 |
| system.physmem.wrQLenPdf::55 0 |
| system.physmem.wrQLenPdf::56 0 |
| system.physmem.wrQLenPdf::57 0 |
| system.physmem.wrQLenPdf::58 0 |
| system.physmem.wrQLenPdf::59 0 |
| system.physmem.wrQLenPdf::60 0 |
| system.physmem.wrQLenPdf::61 0 |
| system.physmem.wrQLenPdf::62 0 |
| system.physmem.wrQLenPdf::63 0 |
| system.physmem.bytesPerActivate::samples 202 |
| system.physmem.bytesPerActivate::mean 288.316832 |
| system.physmem.bytesPerActivate::gmean 177.342258 |
| system.physmem.bytesPerActivate::stdev 298.023303 |
| system.physmem.bytesPerActivate::0-127 71 35.15% 35.15% |
| system.physmem.bytesPerActivate::128-255 55 27.23% 62.38% |
| system.physmem.bytesPerActivate::256-383 17 8.42% 70.79% |
| system.physmem.bytesPerActivate::384-511 14 6.93% 77.72% |
| system.physmem.bytesPerActivate::512-639 12 5.94% 83.66% |
| system.physmem.bytesPerActivate::640-767 6 2.97% 86.63% |
| system.physmem.bytesPerActivate::768-895 9 4.46% 91.09% |
| system.physmem.bytesPerActivate::896-1023 5 2.48% 93.56% |
| system.physmem.bytesPerActivate::1024-1151 13 6.44% 100.00% |
| system.physmem.bytesPerActivate::total 202 |
| system.physmem.totQLat 16137750 |
| system.physmem.totMemAccLat 34194000 |
| system.physmem.totBusLat 4815000 |
| system.physmem.avgQLat 16757.79 |
| system.physmem.avgBusLat 5000.00 |
| system.physmem.avgMemAccLat 35507.79 |
| system.physmem.avgRdBW 2272.78 |
| system.physmem.avgWrBW 0.00 |
| system.physmem.avgRdBWSys 2272.78 |
| system.physmem.avgWrBWSys 0.00 |
| system.physmem.peakBW 12800.00 |
| system.physmem.busUtil 17.76 |
| system.physmem.busUtilRead 17.76 |
| system.physmem.busUtilWrite 0.00 |
| system.physmem.avgRdQLen 2.46 |
| system.physmem.avgWrQLen 0.00 |
| system.physmem.readRowHits 750 |
| system.physmem.writeRowHits 0 |
| system.physmem.readRowHitRate 77.88 |
| system.physmem.writeRowHitRate nan |
| system.physmem.avgGap 28127.21 |
| system.physmem.pageHitRate 77.88 |
| system.physmem_0.actEnergy 835380 |
| system.physmem_0.preEnergy 428835 |
| system.physmem_0.readEnergy 4162620 |
| system.physmem_0.writeEnergy 0 |
| system.physmem_0.refreshEnergy 1843920.000000 |
| system.physmem_0.actBackEnergy 5930850 |
| system.physmem_0.preBackEnergy 47520 |
| system.physmem_0.actPowerDownEnergy 6376590 |
| system.physmem_0.prePowerDownEnergy 1440 |
| system.physmem_0.selfRefreshEnergy 0 |
| system.physmem_0.totalEnergy 19627155 |
| system.physmem_0.averagePower 723.781875 |
| system.physmem_0.totalIdleTime 13833750 |
| system.physmem_0.memoryStateTime::IDLE 40500 |
| system.physmem_0.memoryStateTime::REF 780000 |
| system.physmem_0.memoryStateTime::SREF 0 |
| system.physmem_0.memoryStateTime::PRE_PDN 3750 |
| system.physmem_0.memoryStateTime::ACT 12310750 |
| system.physmem_0.memoryStateTime::ACT_PDN 13982500 |
| system.physmem_1.actEnergy 685440 |
| system.physmem_1.preEnergy 337755 |
| system.physmem_1.readEnergy 2713200 |
| system.physmem_1.writeEnergy 0 |
| system.physmem_1.refreshEnergy 1843920.000000 |
| system.physmem_1.actBackEnergy 4668300 |
| system.physmem_1.preBackEnergy 160320 |
| system.physmem_1.actPowerDownEnergy 7500060 |
| system.physmem_1.prePowerDownEnergy 5760 |
| system.physmem_1.selfRefreshEnergy 0 |
| system.physmem_1.totalEnergy 17914755 |
| system.physmem_1.averagePower 660.634461 |
| system.physmem_1.totalIdleTime 16457500 |
| system.physmem_1.memoryStateTime::IDLE 306000 |
| system.physmem_1.memoryStateTime::REF 780000 |
| system.physmem_1.memoryStateTime::SREF 0 |
| system.physmem_1.memoryStateTime::PRE_PDN 15250 |
| system.physmem_1.memoryStateTime::ACT 9574000 |
| system.physmem_1.memoryStateTime::ACT_PDN 16442250 |
| system.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.branchPred.lookups 5015 |
| system.cpu.branchPred.condPredicted 3001 |
| system.cpu.branchPred.condIncorrect 806 |
| system.cpu.branchPred.BTBLookups 3809 |
| system.cpu.branchPred.BTBHits 1166 |
| system.cpu.branchPred.BTBCorrect 0 |
| system.cpu.branchPred.BTBHitPct 30.611709 |
| system.cpu.branchPred.usedRAS 698 |
| system.cpu.branchPred.RASInCorrect 53 |
| system.cpu.branchPred.indirectLookups 824 |
| system.cpu.branchPred.indirectHits 156 |
| system.cpu.branchPred.indirectMisses 668 |
| system.cpu.branchPredindirectMispredicted 131 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.dtb.fetch_hits 0 |
| system.cpu.dtb.fetch_misses 0 |
| system.cpu.dtb.fetch_acv 0 |
| system.cpu.dtb.fetch_accesses 0 |
| system.cpu.dtb.read_hits 4101 |
| system.cpu.dtb.read_misses 90 |
| system.cpu.dtb.read_acv 0 |
| system.cpu.dtb.read_accesses 4191 |
| system.cpu.dtb.write_hits 1999 |
| system.cpu.dtb.write_misses 49 |
| system.cpu.dtb.write_acv 0 |
| system.cpu.dtb.write_accesses 2048 |
| system.cpu.dtb.data_hits 6100 |
| system.cpu.dtb.data_misses 139 |
| system.cpu.dtb.data_acv 0 |
| system.cpu.dtb.data_accesses 6239 |
| system.cpu.itb.fetch_hits 3896 |
| system.cpu.itb.fetch_misses 51 |
| system.cpu.itb.fetch_acv 0 |
| system.cpu.itb.fetch_accesses 3947 |
| system.cpu.itb.read_hits 0 |
| system.cpu.itb.read_misses 0 |
| system.cpu.itb.read_acv 0 |
| system.cpu.itb.read_accesses 0 |
| system.cpu.itb.write_hits 0 |
| system.cpu.itb.write_misses 0 |
| system.cpu.itb.write_acv 0 |
| system.cpu.itb.write_accesses 0 |
| system.cpu.itb.data_hits 0 |
| system.cpu.itb.data_misses 0 |
| system.cpu.itb.data_acv 0 |
| system.cpu.itb.data_accesses 0 |
| system.cpu.workload0.numSyscalls 17 |
| system.cpu.workload1.numSyscalls 17 |
| system.cpu.pwrStateResidencyTicks::ON 27117500 |
| system.cpu.numCycles 54236 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.fetch.icacheStallCycles 769 |
| system.cpu.fetch.Insts 28725 |
| system.cpu.fetch.Branches 5015 |
| system.cpu.fetch.predictedBranches 2020 |
| system.cpu.fetch.Cycles 9652 |
| system.cpu.fetch.SquashCycles 886 |
| system.cpu.fetch.MiscStallCycles 340 |
| system.cpu.fetch.CacheLines 3896 |
| system.cpu.fetch.IcacheSquashes 581 |
| system.cpu.fetch.rateDist::samples 26268 |
| system.cpu.fetch.rateDist::mean 1.093536 |
| system.cpu.fetch.rateDist::stdev 2.491751 |
| system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% |
| system.cpu.fetch.rateDist::0 21148 80.51% 80.51% |
| system.cpu.fetch.rateDist::1 495 1.88% 82.39% |
| system.cpu.fetch.rateDist::2 401 1.53% 83.92% |
| system.cpu.fetch.rateDist::3 445 1.69% 85.61% |
| system.cpu.fetch.rateDist::4 462 1.76% 87.37% |
| system.cpu.fetch.rateDist::5 360 1.37% 88.74% |
| system.cpu.fetch.rateDist::6 460 1.75% 90.49% |
| system.cpu.fetch.rateDist::7 291 1.11% 91.60% |
| system.cpu.fetch.rateDist::8 2206 8.40% 100.00% |
| system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% |
| system.cpu.fetch.rateDist::min_value 0 |
| system.cpu.fetch.rateDist::max_value 8 |
| system.cpu.fetch.rateDist::total 26268 |
| system.cpu.fetch.branchRate 0.092466 |
| system.cpu.fetch.rate 0.529630 |
| system.cpu.decode.IdleCycles 36232 |
| system.cpu.decode.BlockedCycles 10559 |
| system.cpu.decode.RunCycles 4004 |
| system.cpu.decode.UnblockCycles 499 |
| system.cpu.decode.SquashCycles 740 |
| system.cpu.decode.BranchResolved 1233 |
| system.cpu.decode.BranchMispred 150 |
| system.cpu.decode.DecodedInsts 24986 |
| system.cpu.decode.SquashedInsts 353 |
| system.cpu.rename.SquashCycles 740 |
| system.cpu.rename.IdleCycles 36582 |
| system.cpu.rename.BlockCycles 3853 |
| system.cpu.rename.serializeStallCycles 1413 |
| system.cpu.rename.RunCycles 4167 |
| system.cpu.rename.UnblockCycles 5279 |
| system.cpu.rename.RenamedInsts 23947 |
| system.cpu.rename.ROBFullEvents 27 |
| system.cpu.rename.IQFullEvents 237 |
| system.cpu.rename.LQFullEvents 333 |
| system.cpu.rename.SQFullEvents 4524 |
| system.cpu.rename.RenamedOperands 17933 |
| system.cpu.rename.RenameLookups 29997 |
| system.cpu.rename.int_rename_lookups 29979 |
| system.cpu.rename.fp_rename_lookups 16 |
| system.cpu.rename.CommittedMaps 9154 |
| system.cpu.rename.UndoneMaps 8779 |
| system.cpu.rename.serializingInsts 57 |
| system.cpu.rename.tempSerializingInsts 45 |
| system.cpu.rename.skidInsts 1716 |
| system.cpu.memDep0.insertedLoads 1914 |
| system.cpu.memDep0.insertedStores 1068 |
| system.cpu.memDep0.conflictingLoads 6 |
| system.cpu.memDep0.conflictingStores 0 |
| system.cpu.memDep1.insertedLoads 2644 |
| system.cpu.memDep1.insertedStores 1299 |
| system.cpu.memDep1.conflictingLoads 14 |
| system.cpu.memDep1.conflictingStores 4 |
| system.cpu.iq.iqInstsAdded 22142 |
| system.cpu.iq.iqNonSpecInstsAdded 52 |
| system.cpu.iq.iqInstsIssued 19454 |
| system.cpu.iq.iqSquashedInstsIssued 57 |
| system.cpu.iq.iqSquashedInstsExamined 9423 |
| system.cpu.iq.iqSquashedOperandsExamined 4923 |
| system.cpu.iq.iqSquashedNonSpecRemoved 18 |
| system.cpu.iq.issued_per_cycle::samples 26268 |
| system.cpu.iq.issued_per_cycle::mean 0.740597 |
| system.cpu.iq.issued_per_cycle::stdev 1.454117 |
| system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% |
| system.cpu.iq.issued_per_cycle::0 18898 71.94% 71.94% |
| system.cpu.iq.issued_per_cycle::1 2350 8.95% 80.89% |
| system.cpu.iq.issued_per_cycle::2 1639 6.24% 87.13% |
| system.cpu.iq.issued_per_cycle::3 1288 4.90% 92.03% |
| system.cpu.iq.issued_per_cycle::4 1107 4.21% 96.25% |
| system.cpu.iq.issued_per_cycle::5 560 2.13% 98.38% |
| system.cpu.iq.issued_per_cycle::6 292 1.11% 99.49% |
| system.cpu.iq.issued_per_cycle::7 90 0.34% 99.83% |
| system.cpu.iq.issued_per_cycle::8 44 0.17% 100.00% |
| system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% |
| system.cpu.iq.issued_per_cycle::min_value 0 |
| system.cpu.iq.issued_per_cycle::max_value 8 |
| system.cpu.iq.issued_per_cycle::total 26268 |
| system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% |
| system.cpu.iq.fu_full::IntAlu 27 9.18% 9.18% |
| system.cpu.iq.fu_full::IntMult 0 0.00% 9.18% |
| system.cpu.iq.fu_full::IntDiv 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatAdd 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatCmp 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatCvt 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatMult 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatDiv 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatMisc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::FloatSqrt 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdAdd 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdAlu 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdCmp 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdCvt 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdMisc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdMult 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdShift 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdSqrt 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 9.18% |
| system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 9.18% |
| system.cpu.iq.fu_full::MemRead 190 64.63% 73.81% |
| system.cpu.iq.fu_full::MemWrite 74 25.17% 98.98% |
| system.cpu.iq.fu_full::FloatMemRead 0 0.00% 98.98% |
| system.cpu.iq.fu_full::FloatMemWrite 3 1.02% 100.00% |
| system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% |
| system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% |
| system.cpu.iq.FU_type_0::No_OpClass 2 0.02% 0.02% |
| system.cpu.iq.FU_type_0::IntAlu 5807 66.00% 66.02% |
| system.cpu.iq.FU_type_0::IntMult 1 0.01% 66.03% |
| system.cpu.iq.FU_type_0::IntDiv 0 0.00% 66.03% |
| system.cpu.iq.FU_type_0::FloatAdd 2 0.02% 66.05% |
| system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdMult 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdShift 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdShiftAcc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.05% |
| system.cpu.iq.FU_type_0::MemRead 1993 22.65% 88.70% |
| system.cpu.iq.FU_type_0::MemWrite 986 11.21% 99.91% |
| system.cpu.iq.FU_type_0::FloatMemRead 1 0.01% 99.92% |
| system.cpu.iq.FU_type_0::FloatMemWrite 7 0.08% 100.00% |
| system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% |
| system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% |
| system.cpu.iq.FU_type_0::total 8799 |
| system.cpu.iq.FU_type_1::No_OpClass 2 0.02% 0.02% |
| system.cpu.iq.FU_type_1::IntAlu 7099 66.63% 66.64% |
| system.cpu.iq.FU_type_1::IntMult 1 0.01% 66.65% |
| system.cpu.iq.FU_type_1::IntDiv 0 0.00% 66.65% |
| system.cpu.iq.FU_type_1::FloatAdd 2 0.02% 66.67% |
| system.cpu.iq.FU_type_1::FloatCmp 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::FloatCvt 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::FloatMult 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::FloatMultAcc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::FloatDiv 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::FloatMisc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::FloatSqrt 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdAdd 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdAddAcc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdAlu 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdCmp 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdCvt 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdMisc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdMult 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdMultAcc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdShift 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdShiftAcc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdSqrt 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatAdd 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatAlu 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatCmp 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatCvt 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatDiv 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatMisc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatMult 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatMultAcc 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::SimdFloatSqrt 0 0.00% 66.67% |
| system.cpu.iq.FU_type_1::MemRead 2427 22.78% 89.45% |
| system.cpu.iq.FU_type_1::MemWrite 1116 10.47% 99.92% |
| system.cpu.iq.FU_type_1::FloatMemRead 1 0.01% 99.93% |
| system.cpu.iq.FU_type_1::FloatMemWrite 7 0.07% 100.00% |
| system.cpu.iq.FU_type_1::IprAccess 0 0.00% 100.00% |
| system.cpu.iq.FU_type_1::InstPrefetch 0 0.00% 100.00% |
| system.cpu.iq.FU_type_1::total 10655 |
| system.cpu.iq.FU_type::total 19454 0.00% 0.00% |
| system.cpu.iq.rate 0.358692 |
| system.cpu.iq.fu_busy_cnt::0 148 |
| system.cpu.iq.fu_busy_cnt::1 146 |
| system.cpu.iq.fu_busy_cnt::total 294 |
| system.cpu.iq.fu_busy_rate::0 0.007608 |
| system.cpu.iq.fu_busy_rate::1 0.007505 |
| system.cpu.iq.fu_busy_rate::total 0.015113 |
| system.cpu.iq.int_inst_queue_reads 65484 |
| system.cpu.iq.int_inst_queue_writes 31629 |
| system.cpu.iq.int_inst_queue_wakeup_accesses 17691 |
| system.cpu.iq.fp_inst_queue_reads 43 |
| system.cpu.iq.fp_inst_queue_writes 20 |
| system.cpu.iq.fp_inst_queue_wakeup_accesses 20 |
| system.cpu.iq.int_alu_accesses 19721 |
| system.cpu.iq.fp_alu_accesses 23 |
| system.cpu.iew.lsq.thread0.forwLoads 41 |
| system.cpu.iew.lsq.thread0.invAddrLoads 0 |
| system.cpu.iew.lsq.thread0.squashedLoads 729 |
| system.cpu.iew.lsq.thread0.ignoredResponses 0 |
| system.cpu.iew.lsq.thread0.memOrderViolation 12 |
| system.cpu.iew.lsq.thread0.squashedStores 203 |
| system.cpu.iew.lsq.thread0.invAddrSwpfs 0 |
| system.cpu.iew.lsq.thread0.blockedLoads 0 |
| system.cpu.iew.lsq.thread0.rescheduledLoads 1 |
| system.cpu.iew.lsq.thread0.cacheBlocked 273 |
| system.cpu.iew.lsq.thread1.forwLoads 90 |
| system.cpu.iew.lsq.thread1.invAddrLoads 0 |
| system.cpu.iew.lsq.thread1.squashedLoads 1459 |
| system.cpu.iew.lsq.thread1.ignoredResponses 9 |
| system.cpu.iew.lsq.thread1.memOrderViolation 21 |
| system.cpu.iew.lsq.thread1.squashedStores 434 |
| system.cpu.iew.lsq.thread1.invAddrSwpfs 0 |
| system.cpu.iew.lsq.thread1.blockedLoads 0 |
| system.cpu.iew.lsq.thread1.rescheduledLoads 1 |
| system.cpu.iew.lsq.thread1.cacheBlocked 221 |
| system.cpu.iew.iewIdleCycles 0 |
| system.cpu.iew.iewSquashCycles 740 |
| system.cpu.iew.iewBlockCycles 2317 |
| system.cpu.iew.iewUnblockCycles 426 |
| system.cpu.iew.iewDispatchedInsts 22329 |
| system.cpu.iew.iewDispSquashedInsts 159 |
| system.cpu.iew.iewDispLoadInsts 4558 |
| system.cpu.iew.iewDispStoreInsts 2367 |
| system.cpu.iew.iewDispNonSpecInsts 52 |
| system.cpu.iew.iewIQFullEvents 21 |
| system.cpu.iew.iewLSQFullEvents 403 |
| system.cpu.iew.memOrderViolationEvents 33 |
| system.cpu.iew.predictedTakenIncorrect 142 |
| system.cpu.iew.predictedNotTakenIncorrect 645 |
| system.cpu.iew.branchMispredicts 787 |
| system.cpu.iew.iewExecutedInsts 18732 |
| system.cpu.iew.iewExecLoadInsts::0 1919 |
| system.cpu.iew.iewExecLoadInsts::1 2279 |
| system.cpu.iew.iewExecLoadInsts::total 4198 |
| system.cpu.iew.iewExecSquashedInsts 722 |
| system.cpu.iew.exec_swp::0 0 |
| system.cpu.iew.exec_swp::1 0 |
| system.cpu.iew.exec_swp::total 0 |
| system.cpu.iew.exec_nop::0 63 |
| system.cpu.iew.exec_nop::1 72 |
| system.cpu.iew.exec_nop::total 135 |
| system.cpu.iew.exec_refs::0 2905 |
| system.cpu.iew.exec_refs::1 3353 |
| system.cpu.iew.exec_refs::total 6258 |
| system.cpu.iew.exec_branches::0 1375 |
| system.cpu.iew.exec_branches::1 1612 |
| system.cpu.iew.exec_branches::total 2987 |
| system.cpu.iew.exec_stores::0 986 |
| system.cpu.iew.exec_stores::1 1074 |
| system.cpu.iew.exec_stores::total 2060 |
| system.cpu.iew.exec_rate 0.345379 |
| system.cpu.iew.wb_sent::0 8229 |
| system.cpu.iew.wb_sent::1 9751 |
| system.cpu.iew.wb_sent::total 17980 |
| system.cpu.iew.wb_count::0 8135 |
| system.cpu.iew.wb_count::1 9576 |
| system.cpu.iew.wb_count::total 17711 |
| system.cpu.iew.wb_producers::0 4316 |
| system.cpu.iew.wb_producers::1 5060 |
| system.cpu.iew.wb_producers::total 9376 |
| system.cpu.iew.wb_consumers::0 5785 |
| system.cpu.iew.wb_consumers::1 6812 |
| system.cpu.iew.wb_consumers::total 12597 |
| system.cpu.iew.wb_rate::0 0.149993 |
| system.cpu.iew.wb_rate::1 0.176562 |
| system.cpu.iew.wb_rate::total 0.326554 |
| system.cpu.iew.wb_fanout::0 0.746067 |
| system.cpu.iew.wb_fanout::1 0.742807 |
| system.cpu.iew.wb_fanout::total 0.744304 |
| system.cpu.commit.commitSquashedInsts 9512 |
| system.cpu.commit.commitNonSpecStalls 34 |
| system.cpu.commit.branchMispredicts 661 |
| system.cpu.commit.committed_per_cycle::samples 26245 |
| system.cpu.commit.committed_per_cycle::mean 0.487864 |
| system.cpu.commit.committed_per_cycle::stdev 1.400805 |
| system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% |
| system.cpu.commit.committed_per_cycle::0 21282 81.09% 81.09% |
| system.cpu.commit.committed_per_cycle::1 2428 9.25% 90.34% |
| system.cpu.commit.committed_per_cycle::2 980 3.73% 94.08% |
| system.cpu.commit.committed_per_cycle::3 381 1.45% 95.53% |
| system.cpu.commit.committed_per_cycle::4 266 1.01% 96.54% |
| system.cpu.commit.committed_per_cycle::5 163 0.62% 97.16% |
| system.cpu.commit.committed_per_cycle::6 223 0.85% 98.01% |
| system.cpu.commit.committed_per_cycle::7 120 0.46% 98.47% |
| system.cpu.commit.committed_per_cycle::8 402 1.53% 100.00% |
| system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% |
| system.cpu.commit.committed_per_cycle::min_value 0 |
| system.cpu.commit.committed_per_cycle::max_value 8 |
| system.cpu.commit.committed_per_cycle::total 26245 |
| system.cpu.commit.committedInsts::0 6402 |
| system.cpu.commit.committedInsts::1 6402 |
| system.cpu.commit.committedInsts::total 12804 |
| system.cpu.commit.committedOps::0 6402 |
| system.cpu.commit.committedOps::1 6402 |
| system.cpu.commit.committedOps::total 12804 |
| system.cpu.commit.swp_count::0 0 |
| system.cpu.commit.swp_count::1 0 |
| system.cpu.commit.swp_count::total 0 |
| system.cpu.commit.refs::0 2050 |
| system.cpu.commit.refs::1 2050 |
| system.cpu.commit.refs::total 4100 |
| system.cpu.commit.loads::0 1185 |
| system.cpu.commit.loads::1 1185 |
| system.cpu.commit.loads::total 2370 |
| system.cpu.commit.membars::0 0 |
| system.cpu.commit.membars::1 0 |
| system.cpu.commit.membars::total 0 |
| system.cpu.commit.branches::0 1056 |
| system.cpu.commit.branches::1 1056 |
| system.cpu.commit.branches::total 2112 |
| system.cpu.commit.fp_insts::0 10 |
| system.cpu.commit.fp_insts::1 10 |
| system.cpu.commit.fp_insts::total 20 |
| system.cpu.commit.int_insts::0 6319 |
| system.cpu.commit.int_insts::1 6319 |
| system.cpu.commit.int_insts::total 12638 |
| system.cpu.commit.function_calls::0 127 |
| system.cpu.commit.function_calls::1 127 |
| system.cpu.commit.function_calls::total 254 |
| system.cpu.commit.op_class_0::No_OpClass 19 0.30% 0.30% |
| system.cpu.commit.op_class_0::IntAlu 4330 67.64% 67.93% |
| system.cpu.commit.op_class_0::IntMult 1 0.02% 67.95% |
| system.cpu.commit.op_class_0::IntDiv 0 0.00% 67.95% |
| system.cpu.commit.op_class_0::FloatAdd 2 0.03% 67.98% |
| system.cpu.commit.op_class_0::FloatCmp 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::FloatCvt 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::FloatMult 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::FloatDiv 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::FloatMisc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdAdd 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdAlu 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdCmp 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdCvt 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdMisc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdMult 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdMultAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdShift 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdShiftAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdSqrt 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatAdd 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatMisc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 67.98% |
| system.cpu.commit.op_class_0::MemRead 1184 18.49% 86.47% |
| system.cpu.commit.op_class_0::MemWrite 858 13.40% 99.88% |
| system.cpu.commit.op_class_0::FloatMemRead 1 0.02% 99.89% |
| system.cpu.commit.op_class_0::FloatMemWrite 7 0.11% 100.00% |
| system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% |
| system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% |
| system.cpu.commit.op_class_0::total 6402 |
| system.cpu.commit.op_class_1::No_OpClass 19 0.30% 0.30% |
| system.cpu.commit.op_class_1::IntAlu 4330 67.64% 67.93% |
| system.cpu.commit.op_class_1::IntMult 1 0.02% 67.95% |
| system.cpu.commit.op_class_1::IntDiv 0 0.00% 67.95% |
| system.cpu.commit.op_class_1::FloatAdd 2 0.03% 67.98% |
| system.cpu.commit.op_class_1::FloatCmp 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::FloatCvt 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::FloatMult 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::FloatMultAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::FloatDiv 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::FloatMisc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::FloatSqrt 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdAdd 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdAddAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdAlu 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdCmp 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdCvt 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdMisc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdMult 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdMultAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdShift 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdShiftAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdSqrt 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatAdd 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatAlu 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatCmp 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatCvt 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatDiv 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatMisc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatMult 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatMultAcc 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::SimdFloatSqrt 0 0.00% 67.98% |
| system.cpu.commit.op_class_1::MemRead 1184 18.49% 86.47% |
| system.cpu.commit.op_class_1::MemWrite 858 13.40% 99.88% |
| system.cpu.commit.op_class_1::FloatMemRead 1 0.02% 99.89% |
| system.cpu.commit.op_class_1::FloatMemWrite 7 0.11% 100.00% |
| system.cpu.commit.op_class_1::IprAccess 0 0.00% 100.00% |
| system.cpu.commit.op_class_1::InstPrefetch 0 0.00% 100.00% |
| system.cpu.commit.op_class_1::total 6402 |
| system.cpu.commit.op_class::total 12804 0.00% 0.00% |
| system.cpu.commit.bw_lim_events 402 |
| system.cpu.rob.rob_reads 114640 |
| system.cpu.rob.rob_writes 46397 |
| system.cpu.timesIdled 397 |
| system.cpu.idleCycles 27968 |
| system.cpu.committedInsts::0 6385 |
| system.cpu.committedInsts::1 6385 |
| system.cpu.committedInsts::total 12770 |
| system.cpu.committedOps::0 6385 |
| system.cpu.committedOps::1 6385 |
| system.cpu.committedOps::total 12770 |
| system.cpu.cpi::0 8.494283 |
| system.cpu.cpi::1 8.494283 |
| system.cpu.cpi_total 4.247142 |
| system.cpu.ipc::0 0.117726 |
| system.cpu.ipc::1 0.117726 |
| system.cpu.ipc_total 0.235452 |
| system.cpu.int_regfile_reads 23899 |
| system.cpu.int_regfile_writes 13306 |
| system.cpu.fp_regfile_reads 16 |
| system.cpu.fp_regfile_writes 4 |
| system.cpu.misc_regfile_reads 2 |
| system.cpu.misc_regfile_writes 2 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.dcache.tags.replacements::0 0 |
| system.cpu.dcache.tags.replacements::1 0 |
| system.cpu.dcache.tags.replacements::total 0 |
| system.cpu.dcache.tags.tagsinuse 217.668632 |
| system.cpu.dcache.tags.total_refs 4250 |
| system.cpu.dcache.tags.sampled_refs 342 |
| system.cpu.dcache.tags.avg_refs 12.426901 |
| system.cpu.dcache.tags.warmup_cycle 0 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 217.668632 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.053142 |
| system.cpu.dcache.tags.occ_percent::total 0.053142 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 342 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 67 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 275 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 0.083496 |
| system.cpu.dcache.tags.tag_accesses 10882 |
| system.cpu.dcache.tags.data_accesses 10882 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 3235 |
| system.cpu.dcache.ReadReq_hits::total 3235 |
| system.cpu.dcache.WriteReq_hits::cpu.data 1015 |
| system.cpu.dcache.WriteReq_hits::total 1015 |
| system.cpu.dcache.demand_hits::cpu.data 4250 |
| system.cpu.dcache.demand_hits::total 4250 |
| system.cpu.dcache.overall_hits::cpu.data 4250 |
| system.cpu.dcache.overall_hits::total 4250 |
| system.cpu.dcache.ReadReq_misses::cpu.data 305 |
| system.cpu.dcache.ReadReq_misses::total 305 |
| system.cpu.dcache.WriteReq_misses::cpu.data 715 |
| system.cpu.dcache.WriteReq_misses::total 715 |
| system.cpu.dcache.demand_misses::cpu.data 1020 |
| system.cpu.dcache.demand_misses::total 1020 |
| system.cpu.dcache.overall_misses::cpu.data 1020 |
| system.cpu.dcache.overall_misses::total 1020 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 24356500 |
| system.cpu.dcache.ReadReq_miss_latency::total 24356500 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 50960445 |
| system.cpu.dcache.WriteReq_miss_latency::total 50960445 |
| system.cpu.dcache.demand_miss_latency::cpu.data 75316945 |
| system.cpu.dcache.demand_miss_latency::total 75316945 |
| system.cpu.dcache.overall_miss_latency::cpu.data 75316945 |
| system.cpu.dcache.overall_miss_latency::total 75316945 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 3540 |
| system.cpu.dcache.ReadReq_accesses::total 3540 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 1730 |
| system.cpu.dcache.WriteReq_accesses::total 1730 |
| system.cpu.dcache.demand_accesses::cpu.data 5270 |
| system.cpu.dcache.demand_accesses::total 5270 |
| system.cpu.dcache.overall_accesses::cpu.data 5270 |
| system.cpu.dcache.overall_accesses::total 5270 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.086158 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.086158 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.413295 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.413295 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.193548 |
| system.cpu.dcache.demand_miss_rate::total 0.193548 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.193548 |
| system.cpu.dcache.overall_miss_rate::total 0.193548 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 79857.377049 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 79857.377049 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 71273.349650 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 71273.349650 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 73840.142157 |
| system.cpu.dcache.demand_avg_miss_latency::total 73840.142157 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 73840.142157 |
| system.cpu.dcache.overall_avg_miss_latency::total 73840.142157 |
| system.cpu.dcache.blocked_cycles::no_mshrs 5867 |
| system.cpu.dcache.blocked_cycles::no_targets 0 |
| system.cpu.dcache.blocked::no_mshrs 115 |
| system.cpu.dcache.blocked::no_targets 0 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs 51.017391 |
| system.cpu.dcache.avg_blocked_cycles::no_targets nan |
| system.cpu.dcache.ReadReq_mshr_hits::cpu.data 107 |
| system.cpu.dcache.ReadReq_mshr_hits::total 107 |
| system.cpu.dcache.WriteReq_mshr_hits::cpu.data 570 |
| system.cpu.dcache.WriteReq_mshr_hits::total 570 |
| system.cpu.dcache.demand_mshr_hits::cpu.data 677 |
| system.cpu.dcache.demand_mshr_hits::total 677 |
| system.cpu.dcache.overall_mshr_hits::cpu.data 677 |
| system.cpu.dcache.overall_mshr_hits::total 677 |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 198 |
| system.cpu.dcache.ReadReq_mshr_misses::total 198 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 145 |
| system.cpu.dcache.WriteReq_mshr_misses::total 145 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 343 |
| system.cpu.dcache.demand_mshr_misses::total 343 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 343 |
| system.cpu.dcache.overall_mshr_misses::total 343 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 18395500 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 18395500 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 12405489 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 12405489 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 30800989 |
| system.cpu.dcache.demand_mshr_miss_latency::total 30800989 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 30800989 |
| system.cpu.dcache.overall_mshr_miss_latency::total 30800989 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.055932 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.055932 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.083815 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.083815 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.065085 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.065085 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.065085 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.065085 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 92906.565657 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 92906.565657 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 85555.096552 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 85555.096552 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 89798.801749 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 89798.801749 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 89798.801749 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 89798.801749 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.icache.tags.replacements::0 7 |
| system.cpu.icache.tags.replacements::1 0 |
| system.cpu.icache.tags.replacements::total 7 |
| system.cpu.icache.tags.tagsinuse 317.013453 |
| system.cpu.icache.tags.total_refs 2987 |
| system.cpu.icache.tags.sampled_refs 623 |
| system.cpu.icache.tags.avg_refs 4.794543 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 317.013453 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.154792 |
| system.cpu.icache.tags.occ_percent::total 0.154792 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 616 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 227 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 389 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.300781 |
| system.cpu.icache.tags.tag_accesses 8411 |
| system.cpu.icache.tags.data_accesses 8411 |
| system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.icache.ReadReq_hits::cpu.inst 2987 |
| system.cpu.icache.ReadReq_hits::total 2987 |
| system.cpu.icache.demand_hits::cpu.inst 2987 |
| system.cpu.icache.demand_hits::total 2987 |
| system.cpu.icache.overall_hits::cpu.inst 2987 |
| system.cpu.icache.overall_hits::total 2987 |
| system.cpu.icache.ReadReq_misses::cpu.inst 907 |
| system.cpu.icache.ReadReq_misses::total 907 |
| system.cpu.icache.demand_misses::cpu.inst 907 |
| system.cpu.icache.demand_misses::total 907 |
| system.cpu.icache.overall_misses::cpu.inst 907 |
| system.cpu.icache.overall_misses::total 907 |
| system.cpu.icache.ReadReq_miss_latency::cpu.inst 73557995 |
| system.cpu.icache.ReadReq_miss_latency::total 73557995 |
| system.cpu.icache.demand_miss_latency::cpu.inst 73557995 |
| system.cpu.icache.demand_miss_latency::total 73557995 |
| system.cpu.icache.overall_miss_latency::cpu.inst 73557995 |
| system.cpu.icache.overall_miss_latency::total 73557995 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 3894 |
| system.cpu.icache.ReadReq_accesses::total 3894 |
| system.cpu.icache.demand_accesses::cpu.inst 3894 |
| system.cpu.icache.demand_accesses::total 3894 |
| system.cpu.icache.overall_accesses::cpu.inst 3894 |
| system.cpu.icache.overall_accesses::total 3894 |
| system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.232922 |
| system.cpu.icache.ReadReq_miss_rate::total 0.232922 |
| system.cpu.icache.demand_miss_rate::cpu.inst 0.232922 |
| system.cpu.icache.demand_miss_rate::total 0.232922 |
| system.cpu.icache.overall_miss_rate::cpu.inst 0.232922 |
| system.cpu.icache.overall_miss_rate::total 0.232922 |
| system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 81100.325248 |
| system.cpu.icache.ReadReq_avg_miss_latency::total 81100.325248 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 81100.325248 |
| system.cpu.icache.demand_avg_miss_latency::total 81100.325248 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 81100.325248 |
| system.cpu.icache.overall_avg_miss_latency::total 81100.325248 |
| system.cpu.icache.blocked_cycles::no_mshrs 3028 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 53 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs 57.132075 |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.writebacks::writebacks 7 |
| system.cpu.icache.writebacks::total 7 |
| system.cpu.icache.ReadReq_mshr_hits::cpu.inst 284 |
| system.cpu.icache.ReadReq_mshr_hits::total 284 |
| system.cpu.icache.demand_mshr_hits::cpu.inst 284 |
| system.cpu.icache.demand_mshr_hits::total 284 |
| system.cpu.icache.overall_mshr_hits::cpu.inst 284 |
| system.cpu.icache.overall_mshr_hits::total 284 |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 623 |
| system.cpu.icache.ReadReq_mshr_misses::total 623 |
| system.cpu.icache.demand_mshr_misses::cpu.inst 623 |
| system.cpu.icache.demand_mshr_misses::total 623 |
| system.cpu.icache.overall_mshr_misses::cpu.inst 623 |
| system.cpu.icache.overall_mshr_misses::total 623 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 54126496 |
| system.cpu.icache.ReadReq_mshr_miss_latency::total 54126496 |
| system.cpu.icache.demand_mshr_miss_latency::cpu.inst 54126496 |
| system.cpu.icache.demand_mshr_miss_latency::total 54126496 |
| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 54126496 |
| system.cpu.icache.overall_mshr_miss_latency::total 54126496 |
| system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.159990 |
| system.cpu.icache.ReadReq_mshr_miss_rate::total 0.159990 |
| system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.159990 |
| system.cpu.icache.demand_mshr_miss_rate::total 0.159990 |
| system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.159990 |
| system.cpu.icache.overall_mshr_miss_rate::total 0.159990 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 86880.410915 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 86880.410915 |
| system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 86880.410915 |
| system.cpu.icache.demand_avg_mshr_miss_latency::total 86880.410915 |
| system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 86880.410915 |
| system.cpu.icache.overall_avg_mshr_miss_latency::total 86880.410915 |
| system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.l2cache.tags.replacements::0 0 |
| system.cpu.l2cache.tags.replacements::1 0 |
| system.cpu.l2cache.tags.replacements::total 0 |
| system.cpu.l2cache.tags.tagsinuse 535.282693 |
| system.cpu.l2cache.tags.total_refs 10 |
| system.cpu.l2cache.tags.sampled_refs 962 |
| system.cpu.l2cache.tags.avg_refs 0.010395 |
| system.cpu.l2cache.tags.warmup_cycle 0 |
| system.cpu.l2cache.tags.occ_blocks::cpu.inst 317.481637 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 217.801056 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.009689 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.006647 |
| system.cpu.l2cache.tags.occ_percent::total 0.016336 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 962 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 291 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 671 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 0.029358 |
| system.cpu.l2cache.tags.tag_accesses 8746 |
| system.cpu.l2cache.tags.data_accesses 8746 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.l2cache.WritebackClean_hits::writebacks 7 |
| system.cpu.l2cache.WritebackClean_hits::total 7 |
| system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 3 |
| system.cpu.l2cache.ReadCleanReq_hits::total 3 |
| system.cpu.l2cache.demand_hits::cpu.inst 3 |
| system.cpu.l2cache.demand_hits::total 3 |
| system.cpu.l2cache.overall_hits::cpu.inst 3 |
| system.cpu.l2cache.overall_hits::total 3 |
| system.cpu.l2cache.ReadExReq_misses::cpu.data 146 |
| system.cpu.l2cache.ReadExReq_misses::total 146 |
| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 620 |
| system.cpu.l2cache.ReadCleanReq_misses::total 620 |
| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 197 |
| system.cpu.l2cache.ReadSharedReq_misses::total 197 |
| system.cpu.l2cache.demand_misses::cpu.inst 620 |
| system.cpu.l2cache.demand_misses::cpu.data 343 |
| system.cpu.l2cache.demand_misses::total 963 |
| system.cpu.l2cache.overall_misses::cpu.inst 620 |
| system.cpu.l2cache.overall_misses::cpu.data 343 |
| system.cpu.l2cache.overall_misses::total 963 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 12255000 |
| system.cpu.l2cache.ReadExReq_miss_latency::total 12255000 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 53153500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 53153500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 18016500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::total 18016500 |
| system.cpu.l2cache.demand_miss_latency::cpu.inst 53153500 |
| system.cpu.l2cache.demand_miss_latency::cpu.data 30271500 |
| system.cpu.l2cache.demand_miss_latency::total 83425000 |
| system.cpu.l2cache.overall_miss_latency::cpu.inst 53153500 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 30271500 |
| system.cpu.l2cache.overall_miss_latency::total 83425000 |
| system.cpu.l2cache.WritebackClean_accesses::writebacks 7 |
| system.cpu.l2cache.WritebackClean_accesses::total 7 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 146 |
| system.cpu.l2cache.ReadExReq_accesses::total 146 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 623 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 623 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 197 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 197 |
| system.cpu.l2cache.demand_accesses::cpu.inst 623 |
| system.cpu.l2cache.demand_accesses::cpu.data 343 |
| system.cpu.l2cache.demand_accesses::total 966 |
| system.cpu.l2cache.overall_accesses::cpu.inst 623 |
| system.cpu.l2cache.overall_accesses::cpu.data 343 |
| system.cpu.l2cache.overall_accesses::total 966 |
| system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.995185 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.995185 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 1 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.995185 |
| system.cpu.l2cache.demand_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_miss_rate::total 0.996894 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.995185 |
| system.cpu.l2cache.overall_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_miss_rate::total 0.996894 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 83938.356164 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 83938.356164 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 85731.451613 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 85731.451613 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 91454.314721 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 91454.314721 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 85731.451613 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 88255.102041 |
| system.cpu.l2cache.demand_avg_miss_latency::total 86630.321911 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 85731.451613 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 88255.102041 |
| system.cpu.l2cache.overall_avg_miss_latency::total 86630.321911 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 146 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 146 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 620 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 620 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 197 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 197 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 620 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 343 |
| system.cpu.l2cache.demand_mshr_misses::total 963 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 620 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 343 |
| system.cpu.l2cache.overall_mshr_misses::total 963 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 10795000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 10795000 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 46953500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 46953500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 16056500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 16056500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 46953500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 26851500 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 73805000 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 46953500 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 26851500 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 73805000 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.995185 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.995185 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.995185 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.996894 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.995185 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.996894 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 73938.356164 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 73938.356164 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 75731.451613 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 75731.451613 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 81505.076142 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 81505.076142 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 75731.451613 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 78284.256560 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 76640.706127 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 75731.451613 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 78284.256560 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 76640.706127 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 973 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 9 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 819 |
| system.cpu.toL2Bus.trans_dist::WritebackClean 7 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 146 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 146 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 623 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 197 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1253 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 685 |
| system.cpu.toL2Bus.pkt_count::total 1938 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 40320 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 21888 |
| system.cpu.toL2Bus.pkt_size::total 62208 |
| system.cpu.toL2Bus.snoops 0 |
| system.cpu.toL2Bus.snoopTraffic 0 |
| system.cpu.toL2Bus.snoop_fanout::samples 966 |
| system.cpu.toL2Bus.snoop_fanout::mean 0.002070 |
| system.cpu.toL2Bus.snoop_fanout::stdev 0.045478 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 964 99.79% 99.79% |
| system.cpu.toL2Bus.snoop_fanout::1 2 0.21% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 1 |
| system.cpu.toL2Bus.snoop_fanout::total 966 |
| system.cpu.toL2Bus.reqLayer0.occupancy 493500 |
| system.cpu.toL2Bus.reqLayer0.utilization 1.8 |
| system.cpu.toL2Bus.respLayer0.occupancy 934500 |
| system.cpu.toL2Bus.respLayer0.utilization 3.4 |
| system.cpu.toL2Bus.respLayer1.occupancy 513000 |
| system.cpu.toL2Bus.respLayer1.utilization 1.9 |
| system.membus.snoop_filter.tot_requests 963 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 27117500 |
| system.membus.trans_dist::ReadResp 816 |
| system.membus.trans_dist::ReadExReq 146 |
| system.membus.trans_dist::ReadExResp 146 |
| system.membus.trans_dist::ReadSharedReq 817 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1925 |
| system.membus.pkt_count::total 1925 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 61568 |
| system.membus.pkt_size::total 61568 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 963 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 963 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 963 |
| system.membus.reqLayer0.occupancy 1169500 |
| system.membus.reqLayer0.utilization 4.3 |
| system.membus.respLayer1.occupancy 5110750 |
| system.membus.respLayer1.utilization 18.8 |
| |
| ---------- End Simulation Statistics ---------- |
