mem-cache: Add multi-prefetcher adaptor
This patch adds a meta-prefetcher that enables gem5's cache models to
connect to multiple prefetchers. Sub-prefetchers still use the
probes-based interface and training can be controlled
independently. However, when the cache requests a prefetch packet, the
adaptor traverses the priority list of prefetchers and uses the first
prefetcher that is able to generate a prefetch.
Kudos to Mitch Hayenga for the original version of this patch.
Change-Id: I25569a834997e5404c7183ec995d212912c5dcdf
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18868
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/mem/cache/prefetch/Prefetcher.py b/src/mem/cache/prefetch/Prefetcher.py
index b933b49..3810b6a 100644
--- a/src/mem/cache/prefetch/Prefetcher.py
+++ b/src/mem/cache/prefetch/Prefetcher.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012, 2014 ARM Limited
+# Copyright (c) 2012, 2014, 2019 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -99,6 +99,13 @@
raise TypeError("probeNames must have at least one element")
self.addEvent(HWPProbeEvent(self, simObj, *probeNames))
+class MultiPrefetcher(BasePrefetcher):
+ type = 'MultiPrefetcher'
+ cxx_class = 'MultiPrefetcher'
+ cxx_header = 'mem/cache/prefetch/multi.hh'
+
+ prefetchers = VectorParam.BasePrefetcher([], "Array of prefetchers")
+
class QueuedPrefetcher(BasePrefetcher):
type = "QueuedPrefetcher"
abstract = True
diff --git a/src/mem/cache/prefetch/SConscript b/src/mem/cache/prefetch/SConscript
index 0dae74e..312dc2d 100644
--- a/src/mem/cache/prefetch/SConscript
+++ b/src/mem/cache/prefetch/SConscript
@@ -34,6 +34,7 @@
Source('access_map_pattern_matching.cc')
Source('base.cc')
+Source('multi.cc')
Source('bop.cc')
Source('delta_correlating_prediction_tables.cc')
Source('irregular_stream_buffer.cc')
diff --git a/src/mem/cache/prefetch/base.hh b/src/mem/cache/prefetch/base.hh
index 3ef607f..f4a61b2 100644
--- a/src/mem/cache/prefetch/base.hh
+++ b/src/mem/cache/prefetch/base.hh
@@ -332,7 +332,7 @@
virtual ~BasePrefetcher() {}
- void setCache(BaseCache *_cache);
+ virtual void setCache(BaseCache *_cache);
/**
* Notify prefetcher of cache access (may be any access or just
diff --git a/src/mem/cache/prefetch/multi.cc b/src/mem/cache/prefetch/multi.cc
new file mode 100644
index 0000000..02cb6cf
--- /dev/null
+++ b/src/mem/cache/prefetch/multi.cc
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2014, 2019 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Mitch Hayenga
+ * Andreas Sandberg
+ */
+
+#include "mem/cache/prefetch/multi.hh"
+
+#include "params/MultiPrefetcher.hh"
+
+MultiPrefetcher::MultiPrefetcher(const MultiPrefetcherParams *p)
+ : BasePrefetcher(p),
+ prefetchers(p->prefetchers.begin(), p->prefetchers.end())
+{
+}
+
+void
+MultiPrefetcher::setCache(BaseCache *_cache)
+{
+ for (auto pf : prefetchers)
+ pf->setCache(_cache);
+}
+
+Tick
+MultiPrefetcher::nextPrefetchReadyTime() const
+{
+ Tick next_ready = MaxTick;
+
+ for (auto pf : prefetchers)
+ next_ready = std::min(next_ready, pf->nextPrefetchReadyTime());
+
+ return next_ready;
+}
+
+PacketPtr
+MultiPrefetcher::getPacket()
+{
+ for (auto pf : prefetchers) {
+ if (pf->nextPrefetchReadyTime() <= curTick()) {
+ PacketPtr pkt = pf->getPacket();
+ panic_if(!pkt, "Prefetcher is ready but didn't return a packet.");
+ return pkt;
+ }
+ }
+
+ return nullptr;
+}
+
+
+MultiPrefetcher*
+MultiPrefetcherParams::create()
+{
+ return new MultiPrefetcher(this);
+}
diff --git a/src/mem/cache/prefetch/multi.hh b/src/mem/cache/prefetch/multi.hh
new file mode 100644
index 0000000..88760f5
--- /dev/null
+++ b/src/mem/cache/prefetch/multi.hh
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2014, 2019 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Mitch Hayenga
+ * Andreas Sandberg
+ */
+
+#ifndef __MEM_CACHE_PREFETCH_MULTI_HH__
+#define __MEM_CACHE_PREFETCH_MULTI_HH__
+
+#include "mem/cache/prefetch/base.hh"
+
+struct MultiPrefetcherParams;
+
+class MultiPrefetcher : public BasePrefetcher
+{
+ public: // SimObject
+ MultiPrefetcher(const MultiPrefetcherParams *p);
+
+ public: // BasePrefetcher
+ void setCache(BaseCache *_cache) override;
+ PacketPtr getPacket() override;
+ Tick nextPrefetchReadyTime() const override;
+
+ /** @{ */
+ /**
+ * Ignore notifications since each sub-prefetcher already gets a
+ * notification through their probes-based interface.
+ */
+ void notify(const PacketPtr &pkt, const PrefetchInfo &pfi) override {};
+ void notifyFill(const PacketPtr &pkt) override {};
+ /** @} */
+
+ protected:
+ /** List of sub-prefetchers ordered by priority. */
+ std::list<BasePrefetcher *> prefetchers;
+};
+
+#endif //__MEM_CACHE_PREFETCH_MULTI_HH__
