cpu: Disable MinorCPU value forwarding with write strobes
Change-Id: I7cb50b80b70fcf43ab23eb9e7333d16328993fe1
Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19173
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/cpu/minor/lsq.cc b/src/cpu/minor/lsq.cc
index dea776c..8bbda03 100644
--- a/src/cpu/minor/lsq.cc
+++ b/src/cpu/minor/lsq.cc
@@ -142,10 +142,18 @@
LSQ::AddrRangeCoverage
LSQ::LSQRequest::containsAddrRangeOf(LSQRequestPtr other_request)
{
- return containsAddrRangeOf(request->getPaddr(), request->getSize(),
+ AddrRangeCoverage ret = containsAddrRangeOf(
+ request->getPaddr(), request->getSize(),
other_request->request->getPaddr(), other_request->request->getSize());
+ /* If there is a strobe mask then store data forwarding might not be
+ * correct. Instead of checking enablemant of every byte we just fall back
+ * to PartialAddrRangeCoverage to prohibit store data forwarding */
+ if (ret == FullAddrRangeCoverage && request->isMasked())
+ ret = PartialAddrRangeCoverage;
+ return ret;
}
+
bool
LSQ::LSQRequest::isBarrier()
{
