arch-riscv,misc: Add missing overrides for clang compilation
The Clang compiler returns "missing override" errors without these.
Change-Id: I62af6c338b000123c924f0b3205551579bd5aeb4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41913
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
diff --git a/src/arch/riscv/isa.hh b/src/arch/riscv/isa.hh
index 1c5dac3..7f03a17 100644
--- a/src/arch/riscv/isa.hh
+++ b/src/arch/riscv/isa.hh
@@ -97,8 +97,8 @@
bool inUserMode() const override { return true; }
- void serialize(CheckpointOut &cp) const;
- void unserialize(CheckpointIn &cp);
+ void serialize(CheckpointOut &cp) const override;
+ void unserialize(CheckpointIn &cp) override;
ISA(const Params &p);
};
diff --git a/src/dev/riscv/clint.hh b/src/dev/riscv/clint.hh
index 7b1745c..1f213ce 100644
--- a/src/dev/riscv/clint.hh
+++ b/src/dev/riscv/clint.hh
@@ -139,7 +139,8 @@
* SimObject functions
*/
void init() override;
- Port & getPort(const std::string &if_name, PortID idx=InvalidPortID);
+ Port & getPort(const std::string &if_name,
+ PortID idx=InvalidPortID) override;
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
diff --git a/src/dev/riscv/rtc.hh b/src/dev/riscv/rtc.hh
index bfd9071..42a2d29 100644
--- a/src/dev/riscv/rtc.hh
+++ b/src/dev/riscv/rtc.hh
@@ -70,9 +70,10 @@
RiscvRTC(const Params ¶ms);
- Port & getPort(const std::string &if_name, PortID idx=InvalidPortID);
+ Port & getPort(const std::string &if_name,
+ PortID idx=InvalidPortID) override;
- void startup();
+ void startup() override;
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;