commit c21a2a54ca366c2e699571b1dddd083a77601831
author Giacomo Travaglini <giacomo.travaglini@arm.com> Fri Apr 13 12:05:34 2018 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Thu Apr 19 11:59:16 2018 +0000
tree 7048c09c4f2c7f75114db8b65a0ca4264ca5b084
parent 291c2798103999b66f9ad5b9a885a67f3ef2160e

arch-arm: Fix Unknown Instruction disassemble

Do not print the entire ExtMachInst when disassembling an Unknown
Instruction.

Change-Id: Icd5908ec0fa430090165b2426372bdeb43c2a155
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10062
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

src/arch/arm/insts/misc.cc

diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index d4a2ba2..ef78c23 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -324,5 +324,5 @@
 std::string
 UnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
-    return csprintf("%-10s (inst %#08x)", "unknown", machInst);
+    return csprintf("%-10s (inst %#08x)", "unknown", machInst & mask(32));
 }

src/arch/arm/insts/misc64.cc

diff --git a/src/arch/arm/insts/misc64.cc b/src/arch/arm/insts/misc64.cc
index edc916d..5bdf6cb9 100644
--- a/src/arch/arm/insts/misc64.cc
+++ b/src/arch/arm/insts/misc64.cc
@@ -78,7 +78,7 @@
 std::string
 UnknownOp64::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
-    return csprintf("%-10s (inst %#08x)", "unknown", machInst);
+    return csprintf("%-10s (inst %#08x)", "unknown", machInst & mask(32));
 }
 
 std::string