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# Copyright (c) 2021 The Regents of the University of California
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from abc import abstractmethod
from .....isas import ISA
from ....processors.cpu_types import CPUTypes
from ....processors.abstract_core import AbstractCore
from m5.objects import L1Cache_Controller
import math
class AbstractL1Cache(L1Cache_Controller):
_version = 0
@classmethod
def versionCount(cls):
cls._version += 1 # Use count for this particular type
return cls._version - 1
# TODO: I don't love that we have to pass in the cache line size.
# However, we need some way to set the index bits
def __init__(self, network, cache_line_size):
""" """
super().__init__()
self.version = self.versionCount()
self._cache_line_size = cache_line_size
self.connectQueues(network)
def getBlockSizeBits(self):
bits = int(math.log(self._cache_line_size, 2))
if 2**bits != self._cache_line_size.value:
raise Exception("Cache line size not a power of 2!")
return bits
@abstractmethod
def connectQueues(self, network):
"""Connect all of the queues for this controller."""
raise NotImplementedError