arch: Make the decoder moreBytes method virtual.
Change-Id: I9135508916de91172ec9649d59d80574ac2aaf16
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52077
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index ba2cb70..56be00d 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -135,33 +135,7 @@
/** Reset the decoders internal state. */
void reset() override;
- /**
- * Feed data to the decoder.
- *
- * A CPU model uses this interface to load instruction data into
- * the decoder. Once enough data has been loaded (check with
- * instReady()), a decoded instruction can be retrieved using
- * decode(ArmISA::PCState).
- *
- * This method is intended to support both fixed-length and
- * variable-length instructions. Instruction data is fetch in
- * MachInst blocks (which correspond to the size of a typical
- * insturction). The method might need to be called multiple times
- * if the instruction spans multiple blocks, in that case
- * needMoreBytes() will return true and instReady() will return
- * false.
- *
- * The fetchPC parameter is used to indicate where in memory the
- * instruction was fetched from. This is should be the same
- * address as the pc. If fetching multiple blocks, it indicates
- * where subsequent blocks are fetched from (pc + n *
- * sizeof(MachInst)).
- *
- * @param pc Instruction pointer that we are decoding.
- * @param fetchPC The address this chunk was fetched from.
- * @param inst Raw instruction data.
- */
- void moreBytes(const PCStateBase &pc, Addr fetchPC);
+ void moreBytes(const PCStateBase &pc, Addr fetchPC) override;
/**
* Decode an instruction or fetch it from the code cache.
diff --git a/src/arch/generic/decoder.hh b/src/arch/generic/decoder.hh
index 5033554..aecde07 100644
--- a/src/arch/generic/decoder.hh
+++ b/src/arch/generic/decoder.hh
@@ -28,6 +28,7 @@
#ifndef __ARCH_GENERIC_DECODER_HH__
#define __ARCH_GENERIC_DECODER_HH__
+#include "arch/generic/pcstate.hh"
#include "base/bitfield.hh"
#include "base/intmath.hh"
#include "base/types.hh"
@@ -96,6 +97,33 @@
* instReady() even if this method returns true.
*/
bool needMoreBytes() const { return outOfBytes; }
+
+ /**
+ * Feed data to the decoder.
+ *
+ * A CPU model uses this interface to load instruction data into
+ * the decoder. Once enough data has been loaded (check with
+ * instReady()), a decoded instruction can be retrieved using
+ * decode(PCStateBase &).
+ *
+ * This method is intended to support both fixed-length and
+ * variable-length instructions. Instruction data is fetch in
+ * MachInst blocks (which correspond to the size of a typical
+ * insturction). The method might need to be called multiple times
+ * if the instruction spans multiple blocks, in that case
+ * needMoreBytes() will return true and instReady() will return
+ * false.
+ *
+ * The fetchPC parameter is used to indicate where in memory the
+ * instruction was fetched from. This is should be the same
+ * address as the pc. If fetching multiple blocks, it indicates
+ * where subsequent blocks are fetched from (pc + n *
+ * sizeof(MachInst)).
+ *
+ * @param pc Instruction pointer that we are decoding.
+ * @param fetchPC The address this chunk was fetched from.
+ */
+ virtual void moreBytes(const PCStateBase &pc, Addr fetchPC) = 0;
};
} // namespace gem5
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 72b9c69..eeb1c77 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -58,7 +58,7 @@
//Use this to give data to the decoder. This should be used
//when there is control flow.
void
- moreBytes(const PCStateBase &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC) override
{
emi = letoh(machInst);
instDone = true;
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index f275ecf..79bfb0a 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -55,7 +55,7 @@
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
- moreBytes(const PCStateBase &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC) override
{
emi = gtoh(emi, pc.as<PCState>().byteOrder());
instDone = true;
diff --git a/src/arch/riscv/decoder.hh b/src/arch/riscv/decoder.hh
index a1a893a..3be8a80 100644
--- a/src/arch/riscv/decoder.hh
+++ b/src/arch/riscv/decoder.hh
@@ -73,7 +73,7 @@
//Use this to give data to the decoder. This should be used
//when there is control flow.
- void moreBytes(const PCStateBase &pc, Addr fetchPC);
+ void moreBytes(const PCStateBase &pc, Addr fetchPC) override;
StaticInstPtr decode(PCStateBase &nextPC);
};
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index e6bd817..6b7507fc 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -57,7 +57,7 @@
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
- moreBytes(const PCStateBase &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC) override
{
emi = betoh(machInst);
// The I bit, bit 13, is used to figure out where the ASI
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index ff136af..1283088 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -319,7 +319,7 @@
// Use this to give data to the decoder. This should be used
// when there is control flow.
void
- moreBytes(const PCStateBase &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC) override
{
DPRINTF(Decoder, "Getting more bytes.\n");
basePC = fetchPC;
