configs: Stop using a PTW cache before L2 in Arm configs

This implementation of a walk cache does not allow to skip walks as it
is a simple cache placed in front of the table walker.
It was meant to provide a faster retrieval of page table descriptors
than fetching them from L2 or memory.

This is not needed anymore for Arm as from [1] we implement
partial translation caching in Arm TLBs.

[1]: JIRA:

Change-Id: I00d44a4e3961e15602bf4352f2f42ddccf2b746b
Signed-off-by: Giacomo Travaglini <>
Reviewed-by: Richard Cooper <>
Reviewed-by: Andreas Sandberg <>
Maintainer: Jason Lowe-Power <>
Tested-by: kokoro <>
7 files changed