commit db8641fd7bfb3655044634474737da03fb3eb2f5
author Bobby R. Bruce <bbruce@ucdavis.edu> Thu Sep 08 11:30:14 2022 -0700
committer Bobby Bruce <bbruce@ucdavis.edu> Fri Sep 16 03:16:36 2022 +0000
tree 8b357f179f50a012c86e6a4a733780ee585acf94
parent 3b832fceb9f19606262cb8f24593dca62436d817

stdlib: Add additional warns when `get_runtime_isa` used

While the `runtime` module's `get_runtime_isa` function throws a warning
to remind user's the function is deprecated, this was not always helpful
to a user when setting a processor without a target ISA.

This change adds additional warnings to the SimpleSwitchableProcessor
and the SimpleProcessor. These warnings explain not explicitly setting
the ISA via the processor's constructor is deprecated behavior.

Change-Id: I994ad8355e0d1c3f07374bebe2b59106fb04d212
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63331
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/python/gem5/components/processors/simple_processor.py

diff --git a/src/python/gem5/components/processors/simple_processor.py b/src/python/gem5/components/processors/simple_processor.py
index 83b0585..510e37d 100644
--- a/src/python/gem5/components/processors/simple_processor.py
+++ b/src/python/gem5/components/processors/simple_processor.py
@@ -25,6 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 
+from m5.util import warn
 from .base_cpu_processor import BaseCPUProcessor
 from ..processors.simple_core import SimpleCore
 
@@ -53,6 +54,14 @@
         recommended you explicitly set your ISA via SimpleProcessor
         construction.
         """
+        if not isa:
+            warn(
+                "An ISA for the SimpleProcessor was not set. This will "
+                "result in usage of `runtime.get_runtime_isa` to obtain the "
+                "ISA. This function is deprecated and will be removed in "
+                "future releases of gem5. Please explicitly state the ISA "
+                "via the processor constructor."
+            )
         super().__init__(
             cores=[
                 SimpleCore(cpu_type=cpu_type, core_id=i, isa=isa)

src/python/gem5/components/processors/simple_switchable_processor.py

diff --git a/src/python/gem5/components/processors/simple_switchable_processor.py b/src/python/gem5/components/processors/simple_switchable_processor.py
index 72439e8..56603fa 100644
--- a/src/python/gem5/components/processors/simple_switchable_processor.py
+++ b/src/python/gem5/components/processors/simple_switchable_processor.py
@@ -30,6 +30,7 @@
 from ..processors.cpu_types import CPUTypes, get_mem_mode
 from .switchable_processor import SwitchableProcessor
 from ...isas import ISA
+from m5.util import warn
 
 from ...utils.override import *
 
@@ -65,6 +66,15 @@
         construction.
         """
 
+        if not isa:
+            warn(
+                "An ISA for the SimpleSwitchableProcessor was not set. This "
+                "will result in usage of `runtime.get_runtime_isa` to obtain "
+                "the ISA. This function is deprecated and will be removed in "
+                "future releases of gem5. Please explicitly state the ISA "
+                "via the processor constructor."
+            )
+
         if num_cores <= 0:
             raise AssertionError("Number of cores must be a positive integer!")