| |
| ---------- Begin Simulation Statistics ---------- |
| sim_seconds 0.000124 |
| sim_ticks 124491500 |
| final_tick 124491500 |
| sim_freq 1000000000000 |
| host_inst_rate 5956 |
| host_op_rate 5968 |
| host_tick_rate 6896930 |
| host_mem_usage 272248 |
| host_seconds 18.05 |
| sim_insts 107505 |
| sim_ops 107717 |
| system.voltage_domain.voltage 1 |
| system.clk_domain.clock 1000 |
| system.physmem.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.physmem.bytes_read::cpu.inst 55232 |
| system.physmem.bytes_read::cpu.data 29568 |
| system.physmem.bytes_read::total 84800 |
| system.physmem.bytes_inst_read::cpu.inst 55232 |
| system.physmem.bytes_inst_read::total 55232 |
| system.physmem.num_reads::cpu.inst 863 |
| system.physmem.num_reads::cpu.data 462 |
| system.physmem.num_reads::total 1325 |
| system.physmem.bw_read::cpu.inst 443660812 |
| system.physmem.bw_read::cpu.data 237510191 |
| system.physmem.bw_read::total 681171004 |
| system.physmem.bw_inst_read::cpu.inst 443660812 |
| system.physmem.bw_inst_read::total 443660812 |
| system.physmem.bw_total::cpu.inst 443660812 |
| system.physmem.bw_total::cpu.data 237510191 |
| system.physmem.bw_total::total 681171004 |
| system.physmem.readReqs 1325 |
| system.physmem.writeReqs 0 |
| system.physmem.readBursts 1325 |
| system.physmem.writeBursts 0 |
| system.physmem.bytesReadDRAM 84800 |
| system.physmem.bytesReadWrQ 0 |
| system.physmem.bytesWritten 0 |
| system.physmem.bytesReadSys 84800 |
| system.physmem.bytesWrittenSys 0 |
| system.physmem.servicedByWrQ 0 |
| system.physmem.mergedWrBursts 0 |
| system.physmem.neitherReadNorWriteReqs 0 |
| system.physmem.perBankRdBursts::0 160 |
| system.physmem.perBankRdBursts::1 75 |
| system.physmem.perBankRdBursts::2 130 |
| system.physmem.perBankRdBursts::3 69 |
| system.physmem.perBankRdBursts::4 28 |
| system.physmem.perBankRdBursts::5 73 |
| system.physmem.perBankRdBursts::6 30 |
| system.physmem.perBankRdBursts::7 36 |
| system.physmem.perBankRdBursts::8 80 |
| system.physmem.perBankRdBursts::9 128 |
| system.physmem.perBankRdBursts::10 170 |
| system.physmem.perBankRdBursts::11 139 |
| system.physmem.perBankRdBursts::12 54 |
| system.physmem.perBankRdBursts::13 52 |
| system.physmem.perBankRdBursts::14 50 |
| system.physmem.perBankRdBursts::15 51 |
| system.physmem.perBankWrBursts::0 0 |
| system.physmem.perBankWrBursts::1 0 |
| system.physmem.perBankWrBursts::2 0 |
| system.physmem.perBankWrBursts::3 0 |
| system.physmem.perBankWrBursts::4 0 |
| system.physmem.perBankWrBursts::5 0 |
| system.physmem.perBankWrBursts::6 0 |
| system.physmem.perBankWrBursts::7 0 |
| system.physmem.perBankWrBursts::8 0 |
| system.physmem.perBankWrBursts::9 0 |
| system.physmem.perBankWrBursts::10 0 |
| system.physmem.perBankWrBursts::11 0 |
| system.physmem.perBankWrBursts::12 0 |
| system.physmem.perBankWrBursts::13 0 |
| system.physmem.perBankWrBursts::14 0 |
| system.physmem.perBankWrBursts::15 0 |
| system.physmem.numRdRetry 0 |
| system.physmem.numWrRetry 0 |
| system.physmem.totGap 124370500 |
| system.physmem.readPktSize::0 0 |
| system.physmem.readPktSize::1 0 |
| system.physmem.readPktSize::2 0 |
| system.physmem.readPktSize::3 0 |
| system.physmem.readPktSize::4 0 |
| system.physmem.readPktSize::5 0 |
| system.physmem.readPktSize::6 1325 |
| system.physmem.writePktSize::0 0 |
| system.physmem.writePktSize::1 0 |
| system.physmem.writePktSize::2 0 |
| system.physmem.writePktSize::3 0 |
| system.physmem.writePktSize::4 0 |
| system.physmem.writePktSize::5 0 |
| system.physmem.writePktSize::6 0 |
| system.physmem.rdQLenPdf::0 795 |
| system.physmem.rdQLenPdf::1 342 |
| system.physmem.rdQLenPdf::2 133 |
| system.physmem.rdQLenPdf::3 44 |
| system.physmem.rdQLenPdf::4 10 |
| system.physmem.rdQLenPdf::5 1 |
| system.physmem.rdQLenPdf::6 0 |
| system.physmem.rdQLenPdf::7 0 |
| system.physmem.rdQLenPdf::8 0 |
| system.physmem.rdQLenPdf::9 0 |
| system.physmem.rdQLenPdf::10 0 |
| system.physmem.rdQLenPdf::11 0 |
| system.physmem.rdQLenPdf::12 0 |
| system.physmem.rdQLenPdf::13 0 |
| system.physmem.rdQLenPdf::14 0 |
| system.physmem.rdQLenPdf::15 0 |
| system.physmem.rdQLenPdf::16 0 |
| system.physmem.rdQLenPdf::17 0 |
| system.physmem.rdQLenPdf::18 0 |
| system.physmem.rdQLenPdf::19 0 |
| system.physmem.rdQLenPdf::20 0 |
| system.physmem.rdQLenPdf::21 0 |
| system.physmem.rdQLenPdf::22 0 |
| system.physmem.rdQLenPdf::23 0 |
| system.physmem.rdQLenPdf::24 0 |
| system.physmem.rdQLenPdf::25 0 |
| system.physmem.rdQLenPdf::26 0 |
| system.physmem.rdQLenPdf::27 0 |
| system.physmem.rdQLenPdf::28 0 |
| system.physmem.rdQLenPdf::29 0 |
| system.physmem.rdQLenPdf::30 0 |
| system.physmem.rdQLenPdf::31 0 |
| system.physmem.wrQLenPdf::0 0 |
| system.physmem.wrQLenPdf::1 0 |
| system.physmem.wrQLenPdf::2 0 |
| system.physmem.wrQLenPdf::3 0 |
| system.physmem.wrQLenPdf::4 0 |
| system.physmem.wrQLenPdf::5 0 |
| system.physmem.wrQLenPdf::6 0 |
| system.physmem.wrQLenPdf::7 0 |
| system.physmem.wrQLenPdf::8 0 |
| system.physmem.wrQLenPdf::9 0 |
| system.physmem.wrQLenPdf::10 0 |
| system.physmem.wrQLenPdf::11 0 |
| system.physmem.wrQLenPdf::12 0 |
| system.physmem.wrQLenPdf::13 0 |
| system.physmem.wrQLenPdf::14 0 |
| system.physmem.wrQLenPdf::15 0 |
| system.physmem.wrQLenPdf::16 0 |
| system.physmem.wrQLenPdf::17 0 |
| system.physmem.wrQLenPdf::18 0 |
| system.physmem.wrQLenPdf::19 0 |
| system.physmem.wrQLenPdf::20 0 |
| system.physmem.wrQLenPdf::21 0 |
| system.physmem.wrQLenPdf::22 0 |
| system.physmem.wrQLenPdf::23 0 |
| system.physmem.wrQLenPdf::24 0 |
| system.physmem.wrQLenPdf::25 0 |
| system.physmem.wrQLenPdf::26 0 |
| system.physmem.wrQLenPdf::27 0 |
| system.physmem.wrQLenPdf::28 0 |
| system.physmem.wrQLenPdf::29 0 |
| system.physmem.wrQLenPdf::30 0 |
| system.physmem.wrQLenPdf::31 0 |
| system.physmem.wrQLenPdf::32 0 |
| system.physmem.wrQLenPdf::33 0 |
| system.physmem.wrQLenPdf::34 0 |
| system.physmem.wrQLenPdf::35 0 |
| system.physmem.wrQLenPdf::36 0 |
| system.physmem.wrQLenPdf::37 0 |
| system.physmem.wrQLenPdf::38 0 |
| system.physmem.wrQLenPdf::39 0 |
| system.physmem.wrQLenPdf::40 0 |
| system.physmem.wrQLenPdf::41 0 |
| system.physmem.wrQLenPdf::42 0 |
| system.physmem.wrQLenPdf::43 0 |
| system.physmem.wrQLenPdf::44 0 |
| system.physmem.wrQLenPdf::45 0 |
| system.physmem.wrQLenPdf::46 0 |
| system.physmem.wrQLenPdf::47 0 |
| system.physmem.wrQLenPdf::48 0 |
| system.physmem.wrQLenPdf::49 0 |
| system.physmem.wrQLenPdf::50 0 |
| system.physmem.wrQLenPdf::51 0 |
| system.physmem.wrQLenPdf::52 0 |
| system.physmem.wrQLenPdf::53 0 |
| system.physmem.wrQLenPdf::54 0 |
| system.physmem.wrQLenPdf::55 0 |
| system.physmem.wrQLenPdf::56 0 |
| system.physmem.wrQLenPdf::57 0 |
| system.physmem.wrQLenPdf::58 0 |
| system.physmem.wrQLenPdf::59 0 |
| system.physmem.wrQLenPdf::60 0 |
| system.physmem.wrQLenPdf::61 0 |
| system.physmem.wrQLenPdf::62 0 |
| system.physmem.wrQLenPdf::63 0 |
| system.physmem.bytesPerActivate::samples 293 |
| system.physmem.bytesPerActivate::mean 282.866894 |
| system.physmem.bytesPerActivate::gmean 183.394708 |
| system.physmem.bytesPerActivate::stdev 273.006748 |
| system.physmem.bytesPerActivate::0-127 100 34.13% 34.13% |
| system.physmem.bytesPerActivate::128-255 66 22.53% 56.66% |
| system.physmem.bytesPerActivate::256-383 47 16.04% 72.70% |
| system.physmem.bytesPerActivate::384-511 26 8.87% 81.57% |
| system.physmem.bytesPerActivate::512-639 11 3.75% 85.32% |
| system.physmem.bytesPerActivate::640-767 15 5.12% 90.44% |
| system.physmem.bytesPerActivate::768-895 9 3.07% 93.52% |
| system.physmem.bytesPerActivate::896-1023 4 1.37% 94.88% |
| system.physmem.bytesPerActivate::1024-1151 15 5.12% 100.00% |
| system.physmem.bytesPerActivate::total 293 |
| system.physmem.totQLat 20133000 |
| system.physmem.totMemAccLat 44976750 |
| system.physmem.totBusLat 6625000 |
| system.physmem.avgQLat 15194.72 |
| system.physmem.avgBusLat 5000.00 |
| system.physmem.avgMemAccLat 33944.72 |
| system.physmem.avgRdBW 681.17 |
| system.physmem.avgWrBW 0.00 |
| system.physmem.avgRdBWSys 681.17 |
| system.physmem.avgWrBWSys 0.00 |
| system.physmem.peakBW 12800.00 |
| system.physmem.busUtil 5.32 |
| system.physmem.busUtilRead 5.32 |
| system.physmem.busUtilWrite 0.00 |
| system.physmem.avgRdQLen 1.54 |
| system.physmem.avgWrQLen 0.00 |
| system.physmem.readRowHits 1019 |
| system.physmem.writeRowHits 0 |
| system.physmem.readRowHitRate 76.91 |
| system.physmem.writeRowHitRate nan |
| system.physmem.avgGap 93864.53 |
| system.physmem.pageHitRate 76.91 |
| system.physmem_0.actEnergy 956760 |
| system.physmem_0.preEnergy 481965 |
| system.physmem_0.readEnergy 4291140 |
| system.physmem_0.writeEnergy 0 |
| system.physmem_0.refreshEnergy 9219600.000000 |
| system.physmem_0.actBackEnergy 9317790 |
| system.physmem_0.preBackEnergy 204960 |
| system.physmem_0.actPowerDownEnergy 46016100 |
| system.physmem_0.prePowerDownEnergy 1003200 |
| system.physmem_0.selfRefreshEnergy 0 |
| system.physmem_0.totalEnergy 71491515 |
| system.physmem_0.averagePower 574.263630 |
| system.physmem_0.totalIdleTime 101911500 |
| system.physmem_0.memoryStateTime::IDLE 89500 |
| system.physmem_0.memoryStateTime::REF 3900000 |
| system.physmem_0.memoryStateTime::SREF 0 |
| system.physmem_0.memoryStateTime::PRE_PDN 2612500 |
| system.physmem_0.memoryStateTime::ACT 16963750 |
| system.physmem_0.memoryStateTime::ACT_PDN 100925750 |
| system.physmem_1.actEnergy 1228080 |
| system.physmem_1.preEnergy 629970 |
| system.physmem_1.readEnergy 5169360 |
| system.physmem_1.writeEnergy 0 |
| system.physmem_1.refreshEnergy 9219600.000000 |
| system.physmem_1.actBackEnergy 9878670 |
| system.physmem_1.preBackEnergy 257760 |
| system.physmem_1.actPowerDownEnergy 41086740 |
| system.physmem_1.prePowerDownEnergy 4629120 |
| system.physmem_1.selfRefreshEnergy 0 |
| system.physmem_1.totalEnergy 72099300 |
| system.physmem_1.averagePower 579.145732 |
| system.physmem_1.totalIdleTime 102065000 |
| system.physmem_1.memoryStateTime::IDLE 260500 |
| system.physmem_1.memoryStateTime::REF 3900000 |
| system.physmem_1.memoryStateTime::SREF 0 |
| system.physmem_1.memoryStateTime::PRE_PDN 12050750 |
| system.physmem_1.memoryStateTime::ACT 18181250 |
| system.physmem_1.memoryStateTime::ACT_PDN 90099000 |
| system.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.branchPred.lookups 34816 |
| system.cpu.branchPred.condPredicted 24305 |
| system.cpu.branchPred.condIncorrect 7878 |
| system.cpu.branchPred.BTBLookups 27691 |
| system.cpu.branchPred.BTBHits 13759 |
| system.cpu.branchPred.BTBCorrect 0 |
| system.cpu.branchPred.BTBHitPct 49.687624 |
| system.cpu.branchPred.usedRAS 0 |
| system.cpu.branchPred.RASInCorrect 0 |
| system.cpu.branchPred.indirectLookups 7171 |
| system.cpu.branchPred.indirectHits 3706 |
| system.cpu.branchPred.indirectMisses 3465 |
| system.cpu.branchPredindirectMispredicted 1414 |
| system.cpu_clk_domain.clock 500 |
| system.cpu.dtb.read_hits 0 |
| system.cpu.dtb.read_misses 0 |
| system.cpu.dtb.read_accesses 0 |
| system.cpu.dtb.write_hits 0 |
| system.cpu.dtb.write_misses 0 |
| system.cpu.dtb.write_accesses 0 |
| system.cpu.dtb.hits 0 |
| system.cpu.dtb.misses 0 |
| system.cpu.dtb.accesses 0 |
| system.cpu.itb.read_hits 0 |
| system.cpu.itb.read_misses 0 |
| system.cpu.itb.read_accesses 0 |
| system.cpu.itb.write_hits 0 |
| system.cpu.itb.write_misses 0 |
| system.cpu.itb.write_accesses 0 |
| system.cpu.itb.hits 0 |
| system.cpu.itb.misses 0 |
| system.cpu.itb.accesses 0 |
| system.cpu.workload.numSyscalls 45 |
| system.cpu.pwrStateResidencyTicks::ON 124491500 |
| system.cpu.numCycles 248984 |
| system.cpu.numWorkItemsStarted 0 |
| system.cpu.numWorkItemsCompleted 0 |
| system.cpu.fetch.icacheStallCycles 46747 |
| system.cpu.fetch.Insts 152710 |
| system.cpu.fetch.Branches 34816 |
| system.cpu.fetch.predictedBranches 17465 |
| system.cpu.fetch.Cycles 114549 |
| system.cpu.fetch.SquashCycles 15876 |
| system.cpu.fetch.MiscStallCycles 7 |
| system.cpu.fetch.IcacheWaitRetryStallCycles 92 |
| system.cpu.fetch.CacheLines 27073 |
| system.cpu.fetch.IcacheSquashes 1404 |
| system.cpu.fetch.rateDist::samples 169333 |
| system.cpu.fetch.rateDist::mean 0.903238 |
| system.cpu.fetch.rateDist::stdev 0.994367 |
| system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% |
| system.cpu.fetch.rateDist::0 63074 37.25% 37.25% |
| system.cpu.fetch.rateDist::1 77291 45.64% 82.89% |
| system.cpu.fetch.rateDist::2 18218 10.76% 93.65% |
| system.cpu.fetch.rateDist::3 6642 3.92% 97.57% |
| system.cpu.fetch.rateDist::4 2533 1.50% 99.07% |
| system.cpu.fetch.rateDist::5 841 0.50% 99.57% |
| system.cpu.fetch.rateDist::6 409 0.24% 99.81% |
| system.cpu.fetch.rateDist::7 96 0.06% 99.86% |
| system.cpu.fetch.rateDist::8 229 0.14% 100.00% |
| system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% |
| system.cpu.fetch.rateDist::min_value 0 |
| system.cpu.fetch.rateDist::max_value 8 |
| system.cpu.fetch.rateDist::total 169333 |
| system.cpu.fetch.branchRate 0.139832 |
| system.cpu.fetch.rate 0.613333 |
| system.cpu.decode.IdleCycles 53035 |
| system.cpu.decode.BlockedCycles 15088 |
| system.cpu.decode.RunCycles 95872 |
| system.cpu.decode.UnblockCycles 411 |
| system.cpu.decode.SquashCycles 4927 |
| system.cpu.decode.BranchResolved 13489 |
| system.cpu.decode.BranchMispred 3125 |
| system.cpu.decode.DecodedInsts 138749 |
| system.cpu.decode.SquashedInsts 4432 |
| system.cpu.rename.SquashCycles 4927 |
| system.cpu.rename.IdleCycles 59325 |
| system.cpu.rename.BlockCycles 2075 |
| system.cpu.rename.serializeStallCycles 7298 |
| system.cpu.rename.RunCycles 89979 |
| system.cpu.rename.UnblockCycles 5729 |
| system.cpu.rename.RenamedInsts 132331 |
| system.cpu.rename.ROBFullEvents 3 |
| system.cpu.rename.IQFullEvents 12 |
| system.cpu.rename.LQFullEvents 2887 |
| system.cpu.rename.SQFullEvents 2573 |
| system.cpu.rename.RenamedOperands 88185 |
| system.cpu.rename.RenameLookups 161560 |
| system.cpu.rename.int_rename_lookups 161362 |
| system.cpu.rename.fp_rename_lookups 198 |
| system.cpu.rename.CommittedMaps 70918 |
| system.cpu.rename.UndoneMaps 17267 |
| system.cpu.rename.serializingInsts 307 |
| system.cpu.rename.tempSerializingInsts 307 |
| system.cpu.rename.skidInsts 859 |
| system.cpu.memDep0.insertedLoads 28420 |
| system.cpu.memDep0.insertedStores 17484 |
| system.cpu.memDep0.conflictingLoads 175 |
| system.cpu.memDep0.conflictingStores 17 |
| system.cpu.iq.iqInstsAdded 121763 |
| system.cpu.iq.iqNonSpecInstsAdded 551 |
| system.cpu.iq.iqInstsIssued 119946 |
| system.cpu.iq.iqSquashedInstsIssued 110 |
| system.cpu.iq.iqSquashedInstsExamined 14590 |
| system.cpu.iq.iqSquashedOperandsExamined 6084 |
| system.cpu.iq.iqSquashedNonSpecRemoved 47 |
| system.cpu.iq.issued_per_cycle::samples 169333 |
| system.cpu.iq.issued_per_cycle::mean 0.708344 |
| system.cpu.iq.issued_per_cycle::stdev 0.867381 |
| system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% |
| system.cpu.iq.issued_per_cycle::0 82784 48.89% 48.89% |
| system.cpu.iq.issued_per_cycle::1 62057 36.65% 85.54% |
| system.cpu.iq.issued_per_cycle::2 18132 10.71% 96.24% |
| system.cpu.iq.issued_per_cycle::3 4720 2.79% 99.03% |
| system.cpu.iq.issued_per_cycle::4 1062 0.63% 99.66% |
| system.cpu.iq.issued_per_cycle::5 352 0.21% 99.87% |
| system.cpu.iq.issued_per_cycle::6 152 0.09% 99.96% |
| system.cpu.iq.issued_per_cycle::7 47 0.03% 99.98% |
| system.cpu.iq.issued_per_cycle::8 27 0.02% 100.00% |
| system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% |
| system.cpu.iq.issued_per_cycle::min_value 0 |
| system.cpu.iq.issued_per_cycle::max_value 8 |
| system.cpu.iq.issued_per_cycle::total 169333 |
| system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% |
| system.cpu.iq.fu_full::IntAlu 19 10.33% 10.33% |
| system.cpu.iq.fu_full::IntMult 0 0.00% 10.33% |
| system.cpu.iq.fu_full::IntDiv 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatAdd 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatCmp 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatCvt 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatMult 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatDiv 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatMisc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::FloatSqrt 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdAdd 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdAlu 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdCmp 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdCvt 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdMisc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdMult 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdShift 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdSqrt 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 10.33% |
| system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 10.33% |
| system.cpu.iq.fu_full::MemRead 60 32.61% 42.93% |
| system.cpu.iq.fu_full::MemWrite 102 55.43% 98.37% |
| system.cpu.iq.fu_full::FloatMemRead 0 0.00% 98.37% |
| system.cpu.iq.fu_full::FloatMemWrite 3 1.63% 100.00% |
| system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% |
| system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% |
| system.cpu.iq.FU_type_0::No_OpClass 49 0.04% 0.04% |
| system.cpu.iq.FU_type_0::IntAlu 74493 62.11% 62.15% |
| system.cpu.iq.FU_type_0::IntMult 126 0.11% 62.25% |
| system.cpu.iq.FU_type_0::IntDiv 31 0.03% 62.28% |
| system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 62.28% |
| system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 62.28% |
| system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 62.28% |
| system.cpu.iq.FU_type_0::FloatMult 29 0.02% 62.30% |
| system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdMult 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdShift 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdShiftAcc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 62.30% |
| system.cpu.iq.FU_type_0::MemRead 28137 23.46% 85.76% |
| system.cpu.iq.FU_type_0::MemWrite 17069 14.23% 99.99% |
| system.cpu.iq.FU_type_0::FloatMemRead 0 0.00% 99.99% |
| system.cpu.iq.FU_type_0::FloatMemWrite 12 0.01% 100.00% |
| system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% |
| system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% |
| system.cpu.iq.FU_type_0::total 119946 |
| system.cpu.iq.rate 0.481742 |
| system.cpu.iq.fu_busy_cnt 184 |
| system.cpu.iq.fu_busy_rate 0.001534 |
| system.cpu.iq.int_inst_queue_reads 409434 |
| system.cpu.iq.int_inst_queue_writes 136852 |
| system.cpu.iq.int_inst_queue_wakeup_accesses 114740 |
| system.cpu.iq.fp_inst_queue_reads 85 |
| system.cpu.iq.fp_inst_queue_writes 70 |
| system.cpu.iq.fp_inst_queue_wakeup_accesses 12 |
| system.cpu.iq.int_alu_accesses 120037 |
| system.cpu.iq.fp_alu_accesses 44 |
| system.cpu.iew.lsq.thread0.forwLoads 229 |
| system.cpu.iew.lsq.thread0.invAddrLoads 0 |
| system.cpu.iew.lsq.thread0.squashedLoads 3154 |
| system.cpu.iew.lsq.thread0.ignoredResponses 16 |
| system.cpu.iew.lsq.thread0.memOrderViolation 16 |
| system.cpu.iew.lsq.thread0.squashedStores 1145 |
| system.cpu.iew.lsq.thread0.invAddrSwpfs 0 |
| system.cpu.iew.lsq.thread0.blockedLoads 0 |
| system.cpu.iew.lsq.thread0.rescheduledLoads 0 |
| system.cpu.iew.lsq.thread0.cacheBlocked 151 |
| system.cpu.iew.iewIdleCycles 0 |
| system.cpu.iew.iewSquashCycles 4927 |
| system.cpu.iew.iewBlockCycles 1165 |
| system.cpu.iew.iewUnblockCycles 735 |
| system.cpu.iew.iewDispatchedInsts 122308 |
| system.cpu.iew.iewDispSquashedInsts 5105 |
| system.cpu.iew.iewDispLoadInsts 28420 |
| system.cpu.iew.iewDispStoreInsts 17484 |
| system.cpu.iew.iewDispNonSpecInsts 545 |
| system.cpu.iew.iewIQFullEvents 4 |
| system.cpu.iew.iewLSQFullEvents 726 |
| system.cpu.iew.memOrderViolationEvents 16 |
| system.cpu.iew.predictedTakenIncorrect 2807 |
| system.cpu.iew.predictedNotTakenIncorrect 2546 |
| system.cpu.iew.branchMispredicts 5353 |
| system.cpu.iew.iewExecutedInsts 115997 |
| system.cpu.iew.iewExecLoadInsts 27252 |
| system.cpu.iew.iewExecSquashedInsts 3949 |
| system.cpu.iew.exec_swp 0 |
| system.cpu.iew.exec_nop 0 |
| system.cpu.iew.exec_refs 44098 |
| system.cpu.iew.exec_branches 25988 |
| system.cpu.iew.exec_stores 16846 |
| system.cpu.iew.exec_rate 0.465881 |
| system.cpu.iew.wb_sent 115060 |
| system.cpu.iew.wb_count 114752 |
| system.cpu.iew.wb_producers 37473 |
| system.cpu.iew.wb_consumers 42148 |
| system.cpu.iew.wb_rate 0.460881 |
| system.cpu.iew.wb_fanout 0.889081 |
| system.cpu.commit.commitSquashedInsts 14590 |
| system.cpu.commit.commitNonSpecStalls 498 |
| system.cpu.commit.branchMispredicts 4867 |
| system.cpu.commit.committed_per_cycle::samples 163751 |
| system.cpu.commit.committed_per_cycle::mean 0.657810 |
| system.cpu.commit.committed_per_cycle::stdev 1.217274 |
| system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% |
| system.cpu.commit.committed_per_cycle::0 104340 63.72% 63.72% |
| system.cpu.commit.committed_per_cycle::1 37348 22.81% 86.53% |
| system.cpu.commit.committed_per_cycle::2 8922 5.45% 91.98% |
| system.cpu.commit.committed_per_cycle::3 7132 4.36% 96.33% |
| system.cpu.commit.committed_per_cycle::4 3349 2.05% 98.38% |
| system.cpu.commit.committed_per_cycle::5 785 0.48% 98.85% |
| system.cpu.commit.committed_per_cycle::6 471 0.29% 99.14% |
| system.cpu.commit.committed_per_cycle::7 250 0.15% 99.30% |
| system.cpu.commit.committed_per_cycle::8 1154 0.70% 100.00% |
| system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% |
| system.cpu.commit.committed_per_cycle::min_value 0 |
| system.cpu.commit.committed_per_cycle::max_value 8 |
| system.cpu.commit.committed_per_cycle::total 163751 |
| system.cpu.commit.committedInsts 107505 |
| system.cpu.commit.committedOps 107717 |
| system.cpu.commit.swp_count 0 |
| system.cpu.commit.refs 41605 |
| system.cpu.commit.loads 25266 |
| system.cpu.commit.membars 4 |
| system.cpu.commit.branches 23849 |
| system.cpu.commit.vec_insts 0 |
| system.cpu.commit.fp_insts 12 |
| system.cpu.commit.int_insts 107132 |
| system.cpu.commit.function_calls 6215 |
| system.cpu.commit.op_class_0::No_OpClass 4 0.00% 0.00% |
| system.cpu.commit.op_class_0::IntAlu 65954 61.23% 61.23% |
| system.cpu.commit.op_class_0::IntMult 124 0.12% 61.35% |
| system.cpu.commit.op_class_0::IntDiv 30 0.03% 61.38% |
| system.cpu.commit.op_class_0::FloatAdd 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatCmp 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatCvt 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatMult 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatDiv 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatMisc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdAdd 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdAlu 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdCmp 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdCvt 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdMisc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdMult 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdMultAcc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdShift 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdShiftAcc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdSqrt 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatAdd 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatMisc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 61.38% |
| system.cpu.commit.op_class_0::MemRead 25266 23.46% 84.83% |
| system.cpu.commit.op_class_0::MemWrite 16327 15.16% 99.99% |
| system.cpu.commit.op_class_0::FloatMemRead 0 0.00% 99.99% |
| system.cpu.commit.op_class_0::FloatMemWrite 12 0.01% 100.00% |
| system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% |
| system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% |
| system.cpu.commit.op_class_0::total 107717 |
| system.cpu.commit.bw_lim_events 1154 |
| system.cpu.rob.rob_reads 284332 |
| system.cpu.rob.rob_writes 250205 |
| system.cpu.timesIdled 635 |
| system.cpu.idleCycles 79651 |
| system.cpu.committedInsts 107505 |
| system.cpu.committedOps 107717 |
| system.cpu.cpi 2.316023 |
| system.cpu.cpi_total 2.316023 |
| system.cpu.ipc 0.431775 |
| system.cpu.ipc_total 0.431775 |
| system.cpu.int_regfile_reads 142885 |
| system.cpu.int_regfile_writes 75846 |
| system.cpu.fp_regfile_reads 12 |
| system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.dcache.tags.replacements 0 |
| system.cpu.dcache.tags.tagsinuse 323.490826 |
| system.cpu.dcache.tags.total_refs 41387 |
| system.cpu.dcache.tags.sampled_refs 464 |
| system.cpu.dcache.tags.avg_refs 89.196121 |
| system.cpu.dcache.tags.warmup_cycle 0 |
| system.cpu.dcache.tags.occ_blocks::cpu.data 323.490826 |
| system.cpu.dcache.tags.occ_percent::cpu.data 0.078977 |
| system.cpu.dcache.tags.occ_percent::total 0.078977 |
| system.cpu.dcache.tags.occ_task_id_blocks::1024 464 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::0 13 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::1 229 |
| system.cpu.dcache.tags.age_task_id_blocks_1024::2 222 |
| system.cpu.dcache.tags.occ_task_id_percent::1024 0.113281 |
| system.cpu.dcache.tags.tag_accesses 86644 |
| system.cpu.dcache.tags.data_accesses 86644 |
| system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.dcache.ReadReq_hits::cpu.data 26019 |
| system.cpu.dcache.ReadReq_hits::total 26019 |
| system.cpu.dcache.WriteReq_hits::cpu.data 14893 |
| system.cpu.dcache.WriteReq_hits::total 14893 |
| system.cpu.dcache.LoadLockedReq_hits::cpu.data 238 |
| system.cpu.dcache.LoadLockedReq_hits::total 238 |
| system.cpu.dcache.StoreCondReq_hits::cpu.data 237 |
| system.cpu.dcache.StoreCondReq_hits::total 237 |
| system.cpu.dcache.demand_hits::cpu.data 40912 |
| system.cpu.dcache.demand_hits::total 40912 |
| system.cpu.dcache.overall_hits::cpu.data 40912 |
| system.cpu.dcache.overall_hits::total 40912 |
| system.cpu.dcache.ReadReq_misses::cpu.data 491 |
| system.cpu.dcache.ReadReq_misses::total 491 |
| system.cpu.dcache.WriteReq_misses::cpu.data 1209 |
| system.cpu.dcache.WriteReq_misses::total 1209 |
| system.cpu.dcache.LoadLockedReq_misses::cpu.data 3 |
| system.cpu.dcache.LoadLockedReq_misses::total 3 |
| system.cpu.dcache.demand_misses::cpu.data 1700 |
| system.cpu.dcache.demand_misses::total 1700 |
| system.cpu.dcache.overall_misses::cpu.data 1700 |
| system.cpu.dcache.overall_misses::total 1700 |
| system.cpu.dcache.ReadReq_miss_latency::cpu.data 37658000 |
| system.cpu.dcache.ReadReq_miss_latency::total 37658000 |
| system.cpu.dcache.WriteReq_miss_latency::cpu.data 84443464 |
| system.cpu.dcache.WriteReq_miss_latency::total 84443464 |
| system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 273000 |
| system.cpu.dcache.LoadLockedReq_miss_latency::total 273000 |
| system.cpu.dcache.demand_miss_latency::cpu.data 122101464 |
| system.cpu.dcache.demand_miss_latency::total 122101464 |
| system.cpu.dcache.overall_miss_latency::cpu.data 122101464 |
| system.cpu.dcache.overall_miss_latency::total 122101464 |
| system.cpu.dcache.ReadReq_accesses::cpu.data 26510 |
| system.cpu.dcache.ReadReq_accesses::total 26510 |
| system.cpu.dcache.WriteReq_accesses::cpu.data 16102 |
| system.cpu.dcache.WriteReq_accesses::total 16102 |
| system.cpu.dcache.LoadLockedReq_accesses::cpu.data 241 |
| system.cpu.dcache.LoadLockedReq_accesses::total 241 |
| system.cpu.dcache.StoreCondReq_accesses::cpu.data 237 |
| system.cpu.dcache.StoreCondReq_accesses::total 237 |
| system.cpu.dcache.demand_accesses::cpu.data 42612 |
| system.cpu.dcache.demand_accesses::total 42612 |
| system.cpu.dcache.overall_accesses::cpu.data 42612 |
| system.cpu.dcache.overall_accesses::total 42612 |
| system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.018521 |
| system.cpu.dcache.ReadReq_miss_rate::total 0.018521 |
| system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.075084 |
| system.cpu.dcache.WriteReq_miss_rate::total 0.075084 |
| system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.012448 |
| system.cpu.dcache.LoadLockedReq_miss_rate::total 0.012448 |
| system.cpu.dcache.demand_miss_rate::cpu.data 0.039895 |
| system.cpu.dcache.demand_miss_rate::total 0.039895 |
| system.cpu.dcache.overall_miss_rate::cpu.data 0.039895 |
| system.cpu.dcache.overall_miss_rate::total 0.039895 |
| system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 76696.537678 |
| system.cpu.dcache.ReadReq_avg_miss_latency::total 76696.537678 |
| system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 69845.710505 |
| system.cpu.dcache.WriteReq_avg_miss_latency::total 69845.710505 |
| system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 91000 |
| system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 91000 |
| system.cpu.dcache.demand_avg_miss_latency::cpu.data 71824.390588 |
| system.cpu.dcache.demand_avg_miss_latency::total 71824.390588 |
| system.cpu.dcache.overall_avg_miss_latency::cpu.data 71824.390588 |
| system.cpu.dcache.overall_avg_miss_latency::total 71824.390588 |
| system.cpu.dcache.blocked_cycles::no_mshrs 3851 |
| system.cpu.dcache.blocked_cycles::no_targets 159 |
| system.cpu.dcache.blocked::no_mshrs 61 |
| system.cpu.dcache.blocked::no_targets 2 |
| system.cpu.dcache.avg_blocked_cycles::no_mshrs 63.131148 |
| system.cpu.dcache.avg_blocked_cycles::no_targets 79.500000 |
| system.cpu.dcache.ReadReq_mshr_hits::cpu.data 244 |
| system.cpu.dcache.ReadReq_mshr_hits::total 244 |
| system.cpu.dcache.WriteReq_mshr_hits::cpu.data 994 |
| system.cpu.dcache.WriteReq_mshr_hits::total 994 |
| system.cpu.dcache.LoadLockedReq_mshr_hits::cpu.data 1 |
| system.cpu.dcache.LoadLockedReq_mshr_hits::total 1 |
| system.cpu.dcache.demand_mshr_hits::cpu.data 1238 |
| system.cpu.dcache.demand_mshr_hits::total 1238 |
| system.cpu.dcache.overall_mshr_hits::cpu.data 1238 |
| system.cpu.dcache.overall_mshr_hits::total 1238 |
| system.cpu.dcache.ReadReq_mshr_misses::cpu.data 247 |
| system.cpu.dcache.ReadReq_mshr_misses::total 247 |
| system.cpu.dcache.WriteReq_mshr_misses::cpu.data 215 |
| system.cpu.dcache.WriteReq_mshr_misses::total 215 |
| system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 2 |
| system.cpu.dcache.LoadLockedReq_mshr_misses::total 2 |
| system.cpu.dcache.demand_mshr_misses::cpu.data 462 |
| system.cpu.dcache.demand_mshr_misses::total 462 |
| system.cpu.dcache.overall_mshr_misses::cpu.data 462 |
| system.cpu.dcache.overall_mshr_misses::total 462 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 22176000 |
| system.cpu.dcache.ReadReq_mshr_miss_latency::total 22176000 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 18901498 |
| system.cpu.dcache.WriteReq_mshr_miss_latency::total 18901498 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 194000 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 194000 |
| system.cpu.dcache.demand_mshr_miss_latency::cpu.data 41077498 |
| system.cpu.dcache.demand_mshr_miss_latency::total 41077498 |
| system.cpu.dcache.overall_mshr_miss_latency::cpu.data 41077498 |
| system.cpu.dcache.overall_mshr_miss_latency::total 41077498 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.009317 |
| system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.009317 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.013352 |
| system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.013352 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.008299 |
| system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.008299 |
| system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.010842 |
| system.cpu.dcache.demand_mshr_miss_rate::total 0.010842 |
| system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.010842 |
| system.cpu.dcache.overall_mshr_miss_rate::total 0.010842 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 89781.376518 |
| system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 89781.376518 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 87913.944186 |
| system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 87913.944186 |
| system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 97000 |
| system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 97000 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 88912.333333 |
| system.cpu.dcache.demand_avg_mshr_miss_latency::total 88912.333333 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 88912.333333 |
| system.cpu.dcache.overall_avg_mshr_miss_latency::total 88912.333333 |
| system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.icache.tags.replacements 65 |
| system.cpu.icache.tags.tagsinuse 494.293412 |
| system.cpu.icache.tags.total_refs 26025 |
| system.cpu.icache.tags.sampled_refs 876 |
| system.cpu.icache.tags.avg_refs 29.708904 |
| system.cpu.icache.tags.warmup_cycle 0 |
| system.cpu.icache.tags.occ_blocks::cpu.inst 494.293412 |
| system.cpu.icache.tags.occ_percent::cpu.inst 0.241354 |
| system.cpu.icache.tags.occ_percent::total 0.241354 |
| system.cpu.icache.tags.occ_task_id_blocks::1024 811 |
| system.cpu.icache.tags.age_task_id_blocks_1024::0 57 |
| system.cpu.icache.tags.age_task_id_blocks_1024::1 497 |
| system.cpu.icache.tags.age_task_id_blocks_1024::2 257 |
| system.cpu.icache.tags.occ_task_id_percent::1024 0.395996 |
| system.cpu.icache.tags.tag_accesses 55022 |
| system.cpu.icache.tags.data_accesses 55022 |
| system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.icache.ReadReq_hits::cpu.inst 26025 |
| system.cpu.icache.ReadReq_hits::total 26025 |
| system.cpu.icache.demand_hits::cpu.inst 26025 |
| system.cpu.icache.demand_hits::total 26025 |
| system.cpu.icache.overall_hits::cpu.inst 26025 |
| system.cpu.icache.overall_hits::total 26025 |
| system.cpu.icache.ReadReq_misses::cpu.inst 1048 |
| system.cpu.icache.ReadReq_misses::total 1048 |
| system.cpu.icache.demand_misses::cpu.inst 1048 |
| system.cpu.icache.demand_misses::total 1048 |
| system.cpu.icache.overall_misses::cpu.inst 1048 |
| system.cpu.icache.overall_misses::total 1048 |
| system.cpu.icache.ReadReq_miss_latency::cpu.inst 84617996 |
| system.cpu.icache.ReadReq_miss_latency::total 84617996 |
| system.cpu.icache.demand_miss_latency::cpu.inst 84617996 |
| system.cpu.icache.demand_miss_latency::total 84617996 |
| system.cpu.icache.overall_miss_latency::cpu.inst 84617996 |
| system.cpu.icache.overall_miss_latency::total 84617996 |
| system.cpu.icache.ReadReq_accesses::cpu.inst 27073 |
| system.cpu.icache.ReadReq_accesses::total 27073 |
| system.cpu.icache.demand_accesses::cpu.inst 27073 |
| system.cpu.icache.demand_accesses::total 27073 |
| system.cpu.icache.overall_accesses::cpu.inst 27073 |
| system.cpu.icache.overall_accesses::total 27073 |
| system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.038710 |
| system.cpu.icache.ReadReq_miss_rate::total 0.038710 |
| system.cpu.icache.demand_miss_rate::cpu.inst 0.038710 |
| system.cpu.icache.demand_miss_rate::total 0.038710 |
| system.cpu.icache.overall_miss_rate::cpu.inst 0.038710 |
| system.cpu.icache.overall_miss_rate::total 0.038710 |
| system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 80742.362595 |
| system.cpu.icache.ReadReq_avg_miss_latency::total 80742.362595 |
| system.cpu.icache.demand_avg_miss_latency::cpu.inst 80742.362595 |
| system.cpu.icache.demand_avg_miss_latency::total 80742.362595 |
| system.cpu.icache.overall_avg_miss_latency::cpu.inst 80742.362595 |
| system.cpu.icache.overall_avg_miss_latency::total 80742.362595 |
| system.cpu.icache.blocked_cycles::no_mshrs 884 |
| system.cpu.icache.blocked_cycles::no_targets 0 |
| system.cpu.icache.blocked::no_mshrs 14 |
| system.cpu.icache.blocked::no_targets 0 |
| system.cpu.icache.avg_blocked_cycles::no_mshrs 63.142857 |
| system.cpu.icache.avg_blocked_cycles::no_targets nan |
| system.cpu.icache.writebacks::writebacks 65 |
| system.cpu.icache.writebacks::total 65 |
| system.cpu.icache.ReadReq_mshr_hits::cpu.inst 172 |
| system.cpu.icache.ReadReq_mshr_hits::total 172 |
| system.cpu.icache.demand_mshr_hits::cpu.inst 172 |
| system.cpu.icache.demand_mshr_hits::total 172 |
| system.cpu.icache.overall_mshr_hits::cpu.inst 172 |
| system.cpu.icache.overall_mshr_hits::total 172 |
| system.cpu.icache.ReadReq_mshr_misses::cpu.inst 876 |
| system.cpu.icache.ReadReq_mshr_misses::total 876 |
| system.cpu.icache.demand_mshr_misses::cpu.inst 876 |
| system.cpu.icache.demand_mshr_misses::total 876 |
| system.cpu.icache.overall_mshr_misses::cpu.inst 876 |
| system.cpu.icache.overall_mshr_misses::total 876 |
| system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 73689997 |
| system.cpu.icache.ReadReq_mshr_miss_latency::total 73689997 |
| system.cpu.icache.demand_mshr_miss_latency::cpu.inst 73689997 |
| system.cpu.icache.demand_mshr_miss_latency::total 73689997 |
| system.cpu.icache.overall_mshr_miss_latency::cpu.inst 73689997 |
| system.cpu.icache.overall_mshr_miss_latency::total 73689997 |
| system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.032357 |
| system.cpu.icache.ReadReq_mshr_miss_rate::total 0.032357 |
| system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.032357 |
| system.cpu.icache.demand_mshr_miss_rate::total 0.032357 |
| system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.032357 |
| system.cpu.icache.overall_mshr_miss_rate::total 0.032357 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 84121.001142 |
| system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 84121.001142 |
| system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 84121.001142 |
| system.cpu.icache.demand_avg_mshr_miss_latency::total 84121.001142 |
| system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 84121.001142 |
| system.cpu.icache.overall_avg_mshr_miss_latency::total 84121.001142 |
| system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.l2cache.tags.replacements 0 |
| system.cpu.l2cache.tags.tagsinuse 840.364635 |
| system.cpu.l2cache.tags.total_refs 80 |
| system.cpu.l2cache.tags.sampled_refs 1325 |
| system.cpu.l2cache.tags.avg_refs 0.060377 |
| system.cpu.l2cache.tags.warmup_cycle 0 |
| system.cpu.l2cache.tags.occ_blocks::cpu.inst 517.394471 |
| system.cpu.l2cache.tags.occ_blocks::cpu.data 322.970164 |
| system.cpu.l2cache.tags.occ_percent::cpu.inst 0.015790 |
| system.cpu.l2cache.tags.occ_percent::cpu.data 0.009856 |
| system.cpu.l2cache.tags.occ_percent::total 0.025646 |
| system.cpu.l2cache.tags.occ_task_id_blocks::1024 1325 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::0 66 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::1 734 |
| system.cpu.l2cache.tags.age_task_id_blocks_1024::2 525 |
| system.cpu.l2cache.tags.occ_task_id_percent::1024 0.040436 |
| system.cpu.l2cache.tags.tag_accesses 12565 |
| system.cpu.l2cache.tags.data_accesses 12565 |
| system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.l2cache.WritebackClean_hits::writebacks 65 |
| system.cpu.l2cache.WritebackClean_hits::total 65 |
| system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 13 |
| system.cpu.l2cache.ReadCleanReq_hits::total 13 |
| system.cpu.l2cache.ReadSharedReq_hits::cpu.data 2 |
| system.cpu.l2cache.ReadSharedReq_hits::total 2 |
| system.cpu.l2cache.demand_hits::cpu.inst 13 |
| system.cpu.l2cache.demand_hits::cpu.data 2 |
| system.cpu.l2cache.demand_hits::total 15 |
| system.cpu.l2cache.overall_hits::cpu.inst 13 |
| system.cpu.l2cache.overall_hits::cpu.data 2 |
| system.cpu.l2cache.overall_hits::total 15 |
| system.cpu.l2cache.ReadExReq_misses::cpu.data 215 |
| system.cpu.l2cache.ReadExReq_misses::total 215 |
| system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 863 |
| system.cpu.l2cache.ReadCleanReq_misses::total 863 |
| system.cpu.l2cache.ReadSharedReq_misses::cpu.data 247 |
| system.cpu.l2cache.ReadSharedReq_misses::total 247 |
| system.cpu.l2cache.demand_misses::cpu.inst 863 |
| system.cpu.l2cache.demand_misses::cpu.data 462 |
| system.cpu.l2cache.demand_misses::total 1325 |
| system.cpu.l2cache.overall_misses::cpu.inst 863 |
| system.cpu.l2cache.overall_misses::cpu.data 462 |
| system.cpu.l2cache.overall_misses::total 1325 |
| system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 18572500 |
| system.cpu.l2cache.ReadExReq_miss_latency::total 18572500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 72229500 |
| system.cpu.l2cache.ReadCleanReq_miss_latency::total 72229500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 21968500 |
| system.cpu.l2cache.ReadSharedReq_miss_latency::total 21968500 |
| system.cpu.l2cache.demand_miss_latency::cpu.inst 72229500 |
| system.cpu.l2cache.demand_miss_latency::cpu.data 40541000 |
| system.cpu.l2cache.demand_miss_latency::total 112770500 |
| system.cpu.l2cache.overall_miss_latency::cpu.inst 72229500 |
| system.cpu.l2cache.overall_miss_latency::cpu.data 40541000 |
| system.cpu.l2cache.overall_miss_latency::total 112770500 |
| system.cpu.l2cache.WritebackClean_accesses::writebacks 65 |
| system.cpu.l2cache.WritebackClean_accesses::total 65 |
| system.cpu.l2cache.ReadExReq_accesses::cpu.data 215 |
| system.cpu.l2cache.ReadExReq_accesses::total 215 |
| system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 876 |
| system.cpu.l2cache.ReadCleanReq_accesses::total 876 |
| system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 249 |
| system.cpu.l2cache.ReadSharedReq_accesses::total 249 |
| system.cpu.l2cache.demand_accesses::cpu.inst 876 |
| system.cpu.l2cache.demand_accesses::cpu.data 464 |
| system.cpu.l2cache.demand_accesses::total 1340 |
| system.cpu.l2cache.overall_accesses::cpu.inst 876 |
| system.cpu.l2cache.overall_accesses::cpu.data 464 |
| system.cpu.l2cache.overall_accesses::total 1340 |
| system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.985160 |
| system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.985160 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.991968 |
| system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.991968 |
| system.cpu.l2cache.demand_miss_rate::cpu.inst 0.985160 |
| system.cpu.l2cache.demand_miss_rate::cpu.data 0.995690 |
| system.cpu.l2cache.demand_miss_rate::total 0.988806 |
| system.cpu.l2cache.overall_miss_rate::cpu.inst 0.985160 |
| system.cpu.l2cache.overall_miss_rate::cpu.data 0.995690 |
| system.cpu.l2cache.overall_miss_rate::total 0.988806 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 86383.720930 |
| system.cpu.l2cache.ReadExReq_avg_miss_latency::total 86383.720930 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 83695.828505 |
| system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 83695.828505 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 88941.295547 |
| system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 88941.295547 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 83695.828505 |
| system.cpu.l2cache.demand_avg_miss_latency::cpu.data 87751.082251 |
| system.cpu.l2cache.demand_avg_miss_latency::total 85109.811321 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 83695.828505 |
| system.cpu.l2cache.overall_avg_miss_latency::cpu.data 87751.082251 |
| system.cpu.l2cache.overall_avg_miss_latency::total 85109.811321 |
| system.cpu.l2cache.blocked_cycles::no_mshrs 0 |
| system.cpu.l2cache.blocked_cycles::no_targets 0 |
| system.cpu.l2cache.blocked::no_mshrs 0 |
| system.cpu.l2cache.blocked::no_targets 0 |
| system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan |
| system.cpu.l2cache.avg_blocked_cycles::no_targets nan |
| system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 215 |
| system.cpu.l2cache.ReadExReq_mshr_misses::total 215 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 863 |
| system.cpu.l2cache.ReadCleanReq_mshr_misses::total 863 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 247 |
| system.cpu.l2cache.ReadSharedReq_mshr_misses::total 247 |
| system.cpu.l2cache.demand_mshr_misses::cpu.inst 863 |
| system.cpu.l2cache.demand_mshr_misses::cpu.data 462 |
| system.cpu.l2cache.demand_mshr_misses::total 1325 |
| system.cpu.l2cache.overall_mshr_misses::cpu.inst 863 |
| system.cpu.l2cache.overall_mshr_misses::cpu.data 462 |
| system.cpu.l2cache.overall_mshr_misses::total 1325 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 16422500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 16422500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 63599500 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 63599500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 19498500 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 19498500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 63599500 |
| system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 35921000 |
| system.cpu.l2cache.demand_mshr_miss_latency::total 99520500 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 63599500 |
| system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 35921000 |
| system.cpu.l2cache.overall_mshr_miss_latency::total 99520500 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 |
| system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.985160 |
| system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.985160 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.991968 |
| system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.991968 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.985160 |
| system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.995690 |
| system.cpu.l2cache.demand_mshr_miss_rate::total 0.988806 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.985160 |
| system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.995690 |
| system.cpu.l2cache.overall_mshr_miss_rate::total 0.988806 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 76383.720930 |
| system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 76383.720930 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 73695.828505 |
| system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 73695.828505 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 78941.295547 |
| system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 78941.295547 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 73695.828505 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 77751.082251 |
| system.cpu.l2cache.demand_avg_mshr_miss_latency::total 75109.811321 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 73695.828505 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 77751.082251 |
| system.cpu.l2cache.overall_avg_mshr_miss_latency::total 75109.811321 |
| system.cpu.toL2Bus.snoop_filter.tot_requests 1405 |
| system.cpu.toL2Bus.snoop_filter.hit_single_requests 70 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 |
| system.cpu.toL2Bus.snoop_filter.tot_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 |
| system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
| system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.cpu.toL2Bus.trans_dist::ReadResp 1125 |
| system.cpu.toL2Bus.trans_dist::WritebackClean 65 |
| system.cpu.toL2Bus.trans_dist::ReadExReq 215 |
| system.cpu.toL2Bus.trans_dist::ReadExResp 215 |
| system.cpu.toL2Bus.trans_dist::ReadCleanReq 876 |
| system.cpu.toL2Bus.trans_dist::ReadSharedReq 249 |
| system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1817 |
| system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 928 |
| system.cpu.toL2Bus.pkt_count::total 2745 |
| system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 60224 |
| system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 29696 |
| system.cpu.toL2Bus.pkt_size::total 89920 |
| system.cpu.toL2Bus.snoops 0 |
| system.cpu.toL2Bus.snoopTraffic 0 |
| system.cpu.toL2Bus.snoop_fanout::samples 1340 |
| system.cpu.toL2Bus.snoop_fanout::mean 0.003731 |
| system.cpu.toL2Bus.snoop_fanout::stdev 0.060993 |
| system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.cpu.toL2Bus.snoop_fanout::0 1335 99.63% 99.63% |
| system.cpu.toL2Bus.snoop_fanout::1 5 0.37% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.cpu.toL2Bus.snoop_fanout::min_value 0 |
| system.cpu.toL2Bus.snoop_fanout::max_value 1 |
| system.cpu.toL2Bus.snoop_fanout::total 1340 |
| system.cpu.toL2Bus.reqLayer0.occupancy 767500 |
| system.cpu.toL2Bus.reqLayer0.utilization 0.6 |
| system.cpu.toL2Bus.respLayer0.occupancy 1314000 |
| system.cpu.toL2Bus.respLayer0.utilization 1.1 |
| system.cpu.toL2Bus.respLayer1.occupancy 696000 |
| system.cpu.toL2Bus.respLayer1.utilization 0.6 |
| system.membus.snoop_filter.tot_requests 1325 |
| system.membus.snoop_filter.hit_single_requests 0 |
| system.membus.snoop_filter.hit_multi_requests 0 |
| system.membus.snoop_filter.tot_snoops 0 |
| system.membus.snoop_filter.hit_single_snoops 0 |
| system.membus.snoop_filter.hit_multi_snoops 0 |
| system.membus.pwrStateResidencyTicks::UNDEFINED 124491500 |
| system.membus.trans_dist::ReadResp 1110 |
| system.membus.trans_dist::ReadExReq 215 |
| system.membus.trans_dist::ReadExResp 215 |
| system.membus.trans_dist::ReadSharedReq 1110 |
| system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 2650 |
| system.membus.pkt_count::total 2650 |
| system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 84800 |
| system.membus.pkt_size::total 84800 |
| system.membus.snoops 0 |
| system.membus.snoopTraffic 0 |
| system.membus.snoop_fanout::samples 1325 |
| system.membus.snoop_fanout::mean 0 |
| system.membus.snoop_fanout::stdev 0 |
| system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
| system.membus.snoop_fanout::0 1325 100.00% 100.00% |
| system.membus.snoop_fanout::1 0 0.00% 100.00% |
| system.membus.snoop_fanout::overflows 0 0.00% 100.00% |
| system.membus.snoop_fanout::min_value 0 |
| system.membus.snoop_fanout::max_value 0 |
| system.membus.snoop_fanout::total 1325 |
| system.membus.reqLayer0.occupancy 1620500 |
| system.membus.reqLayer0.utilization 1.3 |
| system.membus.respLayer1.occupancy 7036000 |
| system.membus.respLayer1.utilization 5.7 |
| |
| ---------- End Simulation Statistics ---------- |