arch,cpu: Use PCStateBase for decoder methods.
Change-Id: I79f1c5dd39de7015a5c5b891e1888d9a176bb5b4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52063
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 1867e90..835626f 100644
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -152,8 +152,9 @@
}
void
-Decoder::moreBytes(const PCState &pc, Addr fetchPC)
+Decoder::moreBytes(const PCStateBase &_pc, Addr fetchPC)
{
+ auto &pc = _pc.as<PCState>();
data = letoh(data);
offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
emi.thumb = pc.thumb();
@@ -171,11 +172,13 @@
}
StaticInstPtr
-Decoder::decode(ArmISA::PCState &pc)
+Decoder::decode(PCStateBase &_pc)
{
if (!instDone)
return NULL;
+ auto &pc = _pc.as<PCState>();
+
const int inst_size((!emi.thumb || emi.bigThumb) ? 4 : 2);
ExtMachInst this_emi(emi);
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 34abf5e..5f0e68b 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -182,7 +182,7 @@
* @param fetchPC The address this chunk was fetched from.
* @param inst Raw instruction data.
*/
- void moreBytes(const PCState &pc, Addr fetchPC);
+ void moreBytes(const PCStateBase &pc, Addr fetchPC);
/**
* Decode an instruction or fetch it from the code cache.
@@ -195,7 +195,7 @@
* @return A pointer to a static instruction or NULL if the
* decoder isn't ready (see instReady()).
*/
- StaticInstPtr decode(ArmISA::PCState &pc);
+ StaticInstPtr decode(PCStateBase &pc);
/**
* Take over the state from an old decoder when switching CPUs.
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 0e8e2ca..d90e9c5 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -70,7 +70,7 @@
//Use this to give data to the decoder. This should be used
//when there is control flow.
void
- moreBytes(const PCState &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC)
{
emi = letoh(machInst);
instDone = true;
@@ -111,12 +111,12 @@
public:
StaticInstPtr
- decode(MipsISA::PCState &nextPC)
+ decode(PCStateBase &next_pc)
{
if (!instDone)
return NULL;
instDone = false;
- return decode(emi, nextPC.instAddr());
+ return decode(emi, next_pc.instAddr());
}
};
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index c30af91..f3a2721 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -67,9 +67,9 @@
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
- moreBytes(const PCState &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC)
{
- emi = gtoh(emi, pc.byteOrder());
+ emi = gtoh(emi, pc.as<PCState>().byteOrder());
instDone = true;
}
@@ -108,12 +108,12 @@
public:
StaticInstPtr
- decode(PowerISA::PCState &nextPC)
+ decode(PCStateBase &next_pc)
{
if (!instDone)
return NULL;
instDone = false;
- return decode(emi, nextPC.instAddr());
+ return decode(emi, next_pc.instAddr());
}
};
diff --git a/src/arch/riscv/decoder.cc b/src/arch/riscv/decoder.cc
index ac7e228..4091e56 100644
--- a/src/arch/riscv/decoder.cc
+++ b/src/arch/riscv/decoder.cc
@@ -48,7 +48,7 @@
}
void
-Decoder::moreBytes(const PCState &pc, Addr fetchPC)
+Decoder::moreBytes(const PCStateBase &pc, Addr fetchPC)
{
// The MSB of the upper and lower halves of a machine instruction.
constexpr size_t max_bit = sizeof(machInst) * 8 - 1;
@@ -58,7 +58,7 @@
DPRINTF(Decode, "Requesting bytes 0x%08x from address %#x\n", inst,
fetchPC);
- bool aligned = pc.pc() % sizeof(machInst) == 0;
+ bool aligned = pc.instAddr() % sizeof(machInst) == 0;
if (aligned) {
emi = inst;
if (compressed(emi))
@@ -97,19 +97,21 @@
}
StaticInstPtr
-Decoder::decode(RiscvISA::PCState &nextPC)
+Decoder::decode(PCStateBase &_next_pc)
{
if (!instDone)
return nullptr;
instDone = false;
+ auto &next_pc = _next_pc.as<PCState>();
+
if (compressed(emi)) {
- nextPC.npc(nextPC.instAddr() + sizeof(machInst) / 2);
+ next_pc.npc(next_pc.instAddr() + sizeof(machInst) / 2);
} else {
- nextPC.npc(nextPC.instAddr() + sizeof(machInst));
+ next_pc.npc(next_pc.instAddr() + sizeof(machInst));
}
- return decode(emi, nextPC.instAddr());
+ return decode(emi, next_pc.instAddr());
}
} // namespace RiscvISA
diff --git a/src/arch/riscv/decoder.hh b/src/arch/riscv/decoder.hh
index 8f5083b..c12a48a 100644
--- a/src/arch/riscv/decoder.hh
+++ b/src/arch/riscv/decoder.hh
@@ -76,13 +76,13 @@
//Use this to give data to the decoder. This should be used
//when there is control flow.
- void moreBytes(const PCState &pc, Addr fetchPC);
+ void moreBytes(const PCStateBase &pc, Addr fetchPC);
bool needMoreBytes() { return more; }
bool instReady() { return instDone; }
void takeOverFrom(Decoder *old) {}
- StaticInstPtr decode(RiscvISA::PCState &nextPC);
+ StaticInstPtr decode(PCStateBase &nextPC);
};
} // namespace RiscvISA
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 72fe5df..44695e9 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -66,7 +66,7 @@
// Use this to give data to the predecoder. This should be used
// when there is control flow.
void
- moreBytes(const PCState &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC)
{
emi = betoh(machInst);
// The I bit, bit 13, is used to figure out where the ASI
@@ -124,12 +124,12 @@
public:
StaticInstPtr
- decode(SparcISA::PCState &nextPC)
+ decode(PCStateBase &next_pc)
{
if (!instDone)
return NULL;
instDone = false;
- return decode(emi, nextPC.instAddr());
+ return decode(emi, next_pc.instAddr());
}
};
diff --git a/src/arch/x86/decoder.cc b/src/arch/x86/decoder.cc
index 015a504..842e0ad 100644
--- a/src/arch/x86/decoder.cc
+++ b/src/arch/x86/decoder.cc
@@ -694,12 +694,12 @@
}
StaticInstPtr
-Decoder::decode(PCState &nextPC)
+Decoder::decode(PCStateBase &next_pc)
{
if (!instDone)
return NULL;
instDone = false;
- updateNPC(nextPC);
+ updateNPC(next_pc.as<PCState>());
StaticInstPtr &si = instBytes->si;
if (si)
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 39fdab9..bf5906d 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -313,7 +313,7 @@
// Use this to give data to the decoder. This should be used
// when there is control flow.
void
- moreBytes(const PCState &pc, Addr fetchPC)
+ moreBytes(const PCStateBase &pc, Addr fetchPC)
{
DPRINTF(Decoder, "Getting more bytes.\n");
basePC = fetchPC;
@@ -341,7 +341,7 @@
}
public:
- StaticInstPtr decode(X86ISA::PCState &nextPC);
+ StaticInstPtr decode(PCStateBase &next_pc);
StaticInstPtr fetchRomMicroop(
MicroPC micropc, StaticInstPtr curMacroop) override;
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index e8f7b6c..83dbf6b 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -297,16 +297,14 @@
//If more fetch data is needed, pass it in.
Addr fetch_pc =
(pc_state->instAddr() & pc_mask) + fetchOffset;
- decoder.moreBytes(pc_state->as<TheISA::PCState>(),
- fetch_pc);
+ decoder.moreBytes(*pc_state, fetch_pc);
//If an instruction is ready, decode it.
//Otherwise, we'll have to fetch beyond the
//memory chunk at the current pc.
if (decoder.instReady()) {
fetchDone = true;
- instPtr = decoder.decode(
- pc_state->as<TheISA::PCState>());
+ instPtr = decoder.decode(*pc_state);
thread->pcState(*pc_state);
} else {
fetchDone = false;
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index 612b9e1..5215957 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -382,7 +382,7 @@
decoder->moreBytesSize());
if (!decoder->instReady()) {
- decoder->moreBytes(fetch_info.pc->as<TheISA::PCState>(),
+ decoder->moreBytes(*fetch_info.pc,
line_in->lineBaseAddr + fetch_info.inputIndex);
DPRINTF(Fetch, "Offering MachInst to decoder addr: 0x%x\n",
line_in->lineBaseAddr + fetch_info.inputIndex);
@@ -396,7 +396,7 @@
* Remember not to assign it until *after* calling
* decode */
StaticInstPtr decoded_inst =
- decoder->decode(fetch_info.pc->as<TheISA::PCState>());
+ decoder->decode(*fetch_info.pc);
/* Make a new instruction and pick up the line, stream,
* prediction, thread ids from the incoming line */
diff --git a/src/cpu/o3/fetch.cc b/src/cpu/o3/fetch.cc
index 34e00d4..530fcfb 100644
--- a/src/cpu/o3/fetch.cc
+++ b/src/cpu/o3/fetch.cc
@@ -1227,7 +1227,7 @@
memcpy(dec_ptr->moreBytesPtr(),
fetchBuffer[tid] + blkOffset * instSize, instSize);
- decoder[tid]->moreBytes(this_pc.as<TheISA::PCState>(), fetchAddr);
+ decoder[tid]->moreBytes(this_pc, fetchAddr);
if (dec_ptr->needMoreBytes()) {
blkOffset++;
@@ -1241,8 +1241,7 @@
do {
if (!(curMacroop || inRom)) {
if (dec_ptr->instReady()) {
- staticInst = dec_ptr->decode(
- this_pc.as<TheISA::PCState>());
+ staticInst = dec_ptr->decode(this_pc);
// Increment stat of fetched instructions.
++fetchStats.insts;
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 3e3a94c..84c729e 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -330,11 +330,11 @@
Addr fetch_pc =
(pc_state->instAddr() & decoder.pcMask()) + t_info.fetchOffset;
- decoder.moreBytes(pc_state->as<TheISA::PCState>(), fetch_pc);
+ decoder.moreBytes(*pc_state, fetch_pc);
//Decode an instruction if one is ready. Otherwise, we'll have to
//fetch beyond the MachInst at the current pc.
- instPtr = decoder.decode(pc_state->as<TheISA::PCState>());
+ instPtr = decoder.decode(*pc_state);
if (instPtr) {
t_info.stayAtPC = false;
thread->pcState(*pc_state);
