| { |
| "name": null, |
| "sim_quantum": 0, |
| "system": { |
| "kernel": "/work/gem5/dist/binaries/x86_64-vmlinux-2.6.22.9", |
| "mmap_using_noreserve": false, |
| "kernel_addr_check": true, |
| "bridge": { |
| "ranges": [ |
| "3221225472:4294901760", |
| "9223372036854775808:11529215046068469759", |
| "13835058055282163712:18446744073709551615" |
| ], |
| "slave": { |
| "peer": "system.membus.master[0]", |
| "role": "SLAVE" |
| }, |
| "name": "bridge", |
| "req_size": 16, |
| "clk_domain": "system.clk_domain", |
| "delay": 50000, |
| "eventq_index": 0, |
| "master": { |
| "peer": "system.iobus.slave[0]", |
| "role": "MASTER" |
| }, |
| "cxx_class": "Bridge", |
| "path": "system.bridge", |
| "resp_size": 16, |
| "type": "Bridge" |
| }, |
| "iobus": { |
| "slave": { |
| "peer": [ |
| "system.bridge.master", |
| "system.pc.south_bridge.ide.dma", |
| "system.pc.south_bridge.io_apic.int_master" |
| ], |
| "role": "SLAVE" |
| }, |
| "name": "iobus", |
| "default": { |
| "peer": "system.pc.pciconfig.pio", |
| "role": "MASTER" |
| }, |
| "forward_latency": 1, |
| "clk_domain": "system.clk_domain", |
| "width": 16, |
| "eventq_index": 0, |
| "master": { |
| "peer": [ |
| "system.apicbridge.slave", |
| "system.pc.south_bridge.cmos.pio", |
| "system.pc.south_bridge.dma1.pio", |
| "system.pc.south_bridge.ide.pio", |
| "system.pc.south_bridge.ide.config", |
| "system.pc.south_bridge.keyboard.pio", |
| "system.pc.south_bridge.pic1.pio", |
| "system.pc.south_bridge.pic2.pio", |
| "system.pc.south_bridge.pit.pio", |
| "system.pc.south_bridge.speaker.pio", |
| "system.pc.south_bridge.io_apic.pio", |
| "system.pc.i_dont_exist1.pio", |
| "system.pc.i_dont_exist2.pio", |
| "system.pc.behind_pci.pio", |
| "system.pc.com_1.pio", |
| "system.pc.fake_com_2.pio", |
| "system.pc.fake_com_3.pio", |
| "system.pc.fake_com_4.pio", |
| "system.pc.fake_floppy.pio", |
| "system.iocache.cpu_side" |
| ], |
| "role": "MASTER" |
| }, |
| "response_latency": 2, |
| "cxx_class": "NoncoherentXBar", |
| "path": "system.iobus", |
| "type": "NoncoherentXBar", |
| "use_default_range": false, |
| "frontend_latency": 2 |
| }, |
| "apicbridge": { |
| "ranges": [ |
| "11529215046068469760:11529215046068473855" |
| ], |
| "slave": { |
| "peer": "system.iobus.master[0]", |
| "role": "SLAVE" |
| }, |
| "name": "apicbridge", |
| "req_size": 16, |
| "clk_domain": "system.clk_domain", |
| "delay": 50000, |
| "eventq_index": 0, |
| "master": { |
| "peer": "system.membus.slave[0]", |
| "role": "MASTER" |
| }, |
| "cxx_class": "Bridge", |
| "path": "system.apicbridge", |
| "resp_size": 16, |
| "type": "Bridge" |
| }, |
| "symbolfile": "", |
| "l2c": { |
| "cpu_side": { |
| "peer": "system.toL2Bus.master[0]", |
| "role": "SLAVE" |
| }, |
| "prefetcher": null, |
| "clk_domain": "system.cpu_clk_domain", |
| "write_buffers": 8, |
| "response_latency": 20, |
| "cxx_class": "BaseCache", |
| "size": 4194304, |
| "tags": { |
| "name": "tags", |
| "eventq_index": 0, |
| "hit_latency": 20, |
| "clk_domain": "system.cpu_clk_domain", |
| "sequential_access": false, |
| "assoc": 8, |
| "cxx_class": "LRU", |
| "path": "system.l2c.tags", |
| "block_size": 64, |
| "type": "LRU", |
| "size": 4194304 |
| }, |
| "system": "system", |
| "max_miss_count": 0, |
| "eventq_index": 0, |
| "mem_side": { |
| "peer": "system.membus.slave[2]", |
| "role": "MASTER" |
| }, |
| "mshrs": 20, |
| "forward_snoops": true, |
| "hit_latency": 20, |
| "demand_mshr_reserve": 1, |
| "tgts_per_mshr": 12, |
| "addr_ranges": [ |
| "0:18446744073709551615" |
| ], |
| "is_read_only": false, |
| "prefetch_on_access": false, |
| "path": "system.l2c", |
| "name": "l2c", |
| "type": "BaseCache", |
| "sequential_access": false, |
| "assoc": 8 |
| }, |
| "readfile": "/work/gem5/outgoing/gem5/tests/halt.sh", |
| "intel_mp_table": { |
| "oem_table_addr": 0, |
| "name": "intel_mp_table", |
| "ext_entries": [ |
| { |
| "parent_bus": 0, |
| "name": "ext_entries", |
| "type": "X86IntelMPBusHierarchy", |
| "subtractive_decode": true, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntelMP::BusHierarchy", |
| "path": "system.intel_mp_table.ext_entries", |
| "bus_id": 1 |
| } |
| ], |
| "oem_id": "", |
| "eventq_index": 0, |
| "spec_rev": 4, |
| "base_entries": [ |
| { |
| "enable": true, |
| "local_apic_version": 20, |
| "name": "base_entries00", |
| "family": 0, |
| "local_apic_id": 0, |
| "bootstrap": true, |
| "feature_flags": 0, |
| "eventq_index": 0, |
| "stepping": 0, |
| "cxx_class": "X86ISA::IntelMP::Processor", |
| "path": "system.intel_mp_table.base_entries00", |
| "model": 0, |
| "type": "X86IntelMPProcessor" |
| }, |
| { |
| "enable": true, |
| "name": "base_entries01", |
| "cxx_class": "X86ISA::IntelMP::IOAPIC", |
| "version": 17, |
| "eventq_index": 0, |
| "address": 4273995776, |
| "path": "system.intel_mp_table.base_entries01", |
| "type": "X86IntelMPIOAPIC", |
| "id": 1 |
| }, |
| { |
| "bus_type": "PCI", |
| "name": "base_entries02", |
| "type": "X86IntelMPBus", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntelMP::Bus", |
| "path": "system.intel_mp_table.base_entries02", |
| "bus_id": 0 |
| }, |
| { |
| "bus_type": "ISA", |
| "name": "base_entries03", |
| "type": "X86IntelMPBus", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntelMP::Bus", |
| "path": "system.intel_mp_table.base_entries03", |
| "bus_id": 1 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries04", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 0, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 16, |
| "path": "system.intel_mp_table.base_entries04", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 16 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries05", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries05", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 0 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries06", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 2, |
| "path": "system.intel_mp_table.base_entries06", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 0 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries07", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries07", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 1 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries08", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 1, |
| "path": "system.intel_mp_table.base_entries08", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 1 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries09", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries09", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 3 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries10", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 3, |
| "path": "system.intel_mp_table.base_entries10", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 3 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries11", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries11", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 4 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries12", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 4, |
| "path": "system.intel_mp_table.base_entries12", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 4 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries13", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries13", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 5 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries14", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 5, |
| "path": "system.intel_mp_table.base_entries14", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 5 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries15", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries15", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 6 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries16", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 6, |
| "path": "system.intel_mp_table.base_entries16", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 6 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries17", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries17", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 7 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries18", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 7, |
| "path": "system.intel_mp_table.base_entries18", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 7 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries19", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries19", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 8 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries20", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 8, |
| "path": "system.intel_mp_table.base_entries20", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 8 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries21", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries21", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 9 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries22", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 9, |
| "path": "system.intel_mp_table.base_entries22", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 9 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries23", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries23", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 10 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries24", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 10, |
| "path": "system.intel_mp_table.base_entries24", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 10 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries25", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries25", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 11 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries26", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 11, |
| "path": "system.intel_mp_table.base_entries26", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 11 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries27", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries27", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 12 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries28", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 12, |
| "path": "system.intel_mp_table.base_entries28", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 12 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries29", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries29", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 13 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries30", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 13, |
| "path": "system.intel_mp_table.base_entries30", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 13 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries31", |
| "interrupt_type": "ExtInt", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 0, |
| "path": "system.intel_mp_table.base_entries31", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 14 |
| }, |
| { |
| "polarity": "ConformPolarity", |
| "dest_io_apic_id": 1, |
| "name": "base_entries32", |
| "interrupt_type": "INT", |
| "trigger": "ConformTrigger", |
| "eventq_index": 0, |
| "source_bus_id": 1, |
| "cxx_class": "X86ISA::IntelMP::IOIntAssignment", |
| "dest_io_apic_intin": 14, |
| "path": "system.intel_mp_table.base_entries32", |
| "type": "X86IntelMPIOIntAssignment", |
| "source_bus_irq": 14 |
| } |
| ], |
| "cxx_class": "X86ISA::IntelMP::ConfigTable", |
| "path": "system.intel_mp_table", |
| "type": "X86IntelMPConfigTable", |
| "local_apic": 4276092928, |
| "oem_table_size": 0, |
| "product_id": "" |
| }, |
| "cxx_class": "LinuxX86System", |
| "load_offset": 0, |
| "iocache": { |
| "cpu_side": { |
| "peer": "system.iobus.master[19]", |
| "role": "SLAVE" |
| }, |
| "prefetcher": null, |
| "clk_domain": "system.clk_domain", |
| "write_buffers": 8, |
| "response_latency": 50, |
| "cxx_class": "BaseCache", |
| "size": 1024, |
| "tags": { |
| "name": "tags", |
| "eventq_index": 0, |
| "hit_latency": 50, |
| "clk_domain": "system.clk_domain", |
| "sequential_access": false, |
| "assoc": 8, |
| "cxx_class": "LRU", |
| "path": "system.iocache.tags", |
| "block_size": 64, |
| "type": "LRU", |
| "size": 1024 |
| }, |
| "system": "system", |
| "max_miss_count": 0, |
| "eventq_index": 0, |
| "mem_side": { |
| "peer": "system.membus.slave[4]", |
| "role": "MASTER" |
| }, |
| "mshrs": 20, |
| "forward_snoops": false, |
| "hit_latency": 50, |
| "demand_mshr_reserve": 1, |
| "tgts_per_mshr": 12, |
| "addr_ranges": [ |
| "0:134217727" |
| ], |
| "is_read_only": false, |
| "prefetch_on_access": false, |
| "path": "system.iocache", |
| "name": "iocache", |
| "type": "BaseCache", |
| "sequential_access": false, |
| "assoc": 8 |
| }, |
| "intel_mp_pointer": { |
| "imcr_present": true, |
| "name": "intel_mp_pointer", |
| "spec_rev": 4, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntelMP::FloatingPointer", |
| "path": "system.intel_mp_pointer", |
| "type": "X86IntelMPFloatingPointer", |
| "default_config": 0 |
| }, |
| "memories": [ |
| "system.physmem" |
| ], |
| "acpi_description_table_pointer": { |
| "name": "acpi_description_table_pointer", |
| "cxx_class": "X86ISA::ACPI::RSDP", |
| "xsdt": { |
| "oem_table_id": "", |
| "name": "xsdt", |
| "entries": [], |
| "creator_revision": 0, |
| "creator_id": "", |
| "oem_id": "", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::ACPI::XSDT", |
| "path": "system.acpi_description_table_pointer.xsdt", |
| "oem_revision": 0, |
| "type": "X86ACPIXSDT" |
| }, |
| "rsdt": null, |
| "eventq_index": 0, |
| "oem_id": "", |
| "path": "system.acpi_description_table_pointer", |
| "type": "X86ACPIRSDP", |
| "revision": 2 |
| }, |
| "clk_domain": { |
| "name": "clk_domain", |
| "clock": [ |
| 1000 |
| ], |
| "init_perf_level": 0, |
| "voltage_domain": "system.voltage_domain", |
| "eventq_index": 0, |
| "cxx_class": "SrcClockDomain", |
| "path": "system.clk_domain", |
| "type": "SrcClockDomain", |
| "domain_id": -1 |
| }, |
| "mem_ranges": [ |
| "0:134217727" |
| ], |
| "membus": { |
| "default": { |
| "peer": "system.membus.badaddr_responder.pio", |
| "role": "MASTER" |
| }, |
| "slave": { |
| "peer": [ |
| "system.apicbridge.master", |
| "system.system_port", |
| "system.l2c.mem_side", |
| "system.cpu0.interrupts.int_master", |
| "system.iocache.mem_side" |
| ], |
| "role": "SLAVE" |
| }, |
| "name": "membus", |
| "badaddr_responder": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "badaddr_responder", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.membus.default", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": true, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 8, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.membus.badaddr_responder", |
| "pio_addr": 0, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "snoop_filter": null, |
| "forward_latency": 4, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "width": 16, |
| "eventq_index": 0, |
| "master": { |
| "peer": [ |
| "system.bridge.slave", |
| "system.cpu0.interrupts.pio", |
| "system.cpu0.interrupts.int_slave", |
| "system.physmem.port" |
| ], |
| "role": "MASTER" |
| }, |
| "response_latency": 2, |
| "cxx_class": "CoherentXBar", |
| "path": "system.membus", |
| "snoop_response_latency": 4, |
| "type": "CoherentXBar", |
| "use_default_range": false, |
| "frontend_latency": 3 |
| }, |
| "pc": { |
| "fake_com_4": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "fake_com_4", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[17]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 8, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.fake_com_4", |
| "pio_addr": 9223372036854776552, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "pciconfig": { |
| "name": "pciconfig", |
| "pio": { |
| "peer": "system.iobus.default", |
| "role": "SLAVE" |
| }, |
| "bus": 0, |
| "pio_latency": 30000, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "platform": "system.pc", |
| "eventq_index": 0, |
| "cxx_class": "PciConfigAll", |
| "path": "system.pc.pciconfig", |
| "pio_addr": 0, |
| "type": "PciConfigAll", |
| "size": 16777216 |
| }, |
| "fake_com_2": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "fake_com_2", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[15]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 8, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.fake_com_2", |
| "pio_addr": 9223372036854776568, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "name": "pc", |
| "south_bridge": { |
| "int_lines": [ |
| { |
| "name": "int_lines0", |
| "source": "system.pc.south_bridge.pic1.output", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 0, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.io_apic", |
| "path": "system.pc.south_bridge.int_lines0.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines0", |
| "type": "X86IntLine" |
| }, |
| { |
| "name": "int_lines1", |
| "source": "system.pc.south_bridge.pic2.output", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 2, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.pic1", |
| "path": "system.pc.south_bridge.int_lines1.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines1", |
| "type": "X86IntLine" |
| }, |
| { |
| "name": "int_lines2", |
| "source": "system.pc.south_bridge.cmos.int_pin", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 0, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.pic2", |
| "path": "system.pc.south_bridge.int_lines2.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines2", |
| "type": "X86IntLine" |
| }, |
| { |
| "name": "int_lines3", |
| "source": "system.pc.south_bridge.pit.int_pin", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 0, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.pic1", |
| "path": "system.pc.south_bridge.int_lines3.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines3", |
| "type": "X86IntLine" |
| }, |
| { |
| "name": "int_lines4", |
| "source": "system.pc.south_bridge.pit.int_pin", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 2, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.io_apic", |
| "path": "system.pc.south_bridge.int_lines4.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines4", |
| "type": "X86IntLine" |
| }, |
| { |
| "name": "int_lines5", |
| "source": "system.pc.south_bridge.keyboard.keyboard_int_pin", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 1, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.io_apic", |
| "path": "system.pc.south_bridge.int_lines5.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines5", |
| "type": "X86IntLine" |
| }, |
| { |
| "name": "int_lines6", |
| "source": "system.pc.south_bridge.keyboard.mouse_int_pin", |
| "eventq_index": 0, |
| "sink": { |
| "name": "sink", |
| "number": 12, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::IntSinkPin", |
| "device": "system.pc.south_bridge.io_apic", |
| "path": "system.pc.south_bridge.int_lines6.sink", |
| "type": "X86IntSinkPin" |
| }, |
| "cxx_class": "X86ISA::IntLine", |
| "path": "system.pc.south_bridge.int_lines6", |
| "type": "X86IntLine" |
| } |
| ], |
| "name": "south_bridge", |
| "speaker": { |
| "name": "speaker", |
| "pio": { |
| "peer": "system.iobus.master[9]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Speaker", |
| "path": "system.pc.south_bridge.speaker", |
| "pio_addr": 9223372036854775905, |
| "type": "PcSpeaker", |
| "i8254": "system.pc.south_bridge.pit" |
| }, |
| "keyboard": { |
| "system": "system", |
| "command_port": 9223372036854775908, |
| "name": "keyboard", |
| "pio": { |
| "peer": "system.iobus.master[5]", |
| "role": "SLAVE" |
| }, |
| "mouse_int_pin": { |
| "eventq_index": 0, |
| "path": "system.pc.south_bridge.keyboard.mouse_int_pin", |
| "type": "X86IntSourcePin", |
| "name": "mouse_int_pin", |
| "cxx_class": "X86ISA::IntSourcePin" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "keyboard_int_pin": { |
| "eventq_index": 0, |
| "path": "system.pc.south_bridge.keyboard.keyboard_int_pin", |
| "type": "X86IntSourcePin", |
| "name": "keyboard_int_pin", |
| "cxx_class": "X86ISA::IntSourcePin" |
| }, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::I8042", |
| "path": "system.pc.south_bridge.keyboard", |
| "pio_addr": 0, |
| "data_port": 9223372036854775904, |
| "type": "I8042" |
| }, |
| "pit": { |
| "name": "pit", |
| "pio": { |
| "peer": "system.iobus.master[8]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "int_pin": { |
| "eventq_index": 0, |
| "path": "system.pc.south_bridge.pit.int_pin", |
| "type": "X86IntSourcePin", |
| "name": "int_pin", |
| "cxx_class": "X86ISA::IntSourcePin" |
| }, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::I8254", |
| "path": "system.pc.south_bridge.pit", |
| "pio_addr": 9223372036854775872, |
| "type": "I8254" |
| }, |
| "io_apic": { |
| "int_master": { |
| "peer": "system.iobus.slave[2]", |
| "role": "MASTER" |
| }, |
| "name": "io_apic", |
| "pio": { |
| "peer": "system.iobus.master[10]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "external_int_pic": "system.pc.south_bridge.pic1", |
| "system": "system", |
| "apic_id": 1, |
| "int_latency": 1000, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::I82094AA", |
| "path": "system.pc.south_bridge.io_apic", |
| "pio_addr": 4273995776, |
| "type": "I82094AA" |
| }, |
| "pic1": { |
| "slave": "system.pc.south_bridge.pic2", |
| "name": "pic1", |
| "output": { |
| "eventq_index": 0, |
| "path": "system.pc.south_bridge.pic1.output", |
| "type": "X86IntSourcePin", |
| "name": "output", |
| "cxx_class": "X86ISA::IntSourcePin" |
| }, |
| "pio": { |
| "peer": "system.iobus.master[6]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "mode": "I8259Master", |
| "cxx_class": "X86ISA::I8259", |
| "path": "system.pc.south_bridge.pic1", |
| "pio_addr": 9223372036854775840, |
| "type": "I8259" |
| }, |
| "pic2": { |
| "slave": null, |
| "name": "pic2", |
| "output": { |
| "eventq_index": 0, |
| "path": "system.pc.south_bridge.pic2.output", |
| "type": "X86IntSourcePin", |
| "name": "output", |
| "cxx_class": "X86ISA::IntSourcePin" |
| }, |
| "pio": { |
| "peer": "system.iobus.master[7]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "mode": "I8259Slave", |
| "cxx_class": "X86ISA::I8259", |
| "path": "system.pc.south_bridge.pic2", |
| "pio_addr": 9223372036854775968, |
| "type": "I8259" |
| }, |
| "platform": "system.pc", |
| "dma1": { |
| "name": "dma1", |
| "pio": { |
| "peer": "system.iobus.master[2]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::I8237", |
| "path": "system.pc.south_bridge.dma1", |
| "pio_addr": 9223372036854775808, |
| "type": "I8237" |
| }, |
| "eventq_index": 0, |
| "cxx_class": "SouthBridge", |
| "path": "system.pc.south_bridge", |
| "ide": { |
| "PMCAPNextCapability": 0, |
| "InterruptPin": 1, |
| "HeaderType": 0, |
| "VendorID": 32902, |
| "MSIXMsgCtrl": 0, |
| "MSIXCAPNextCapability": 0, |
| "PXCAPLinkCtrl": 0, |
| "Revision": 0, |
| "LegacyIOBase": 9223372036854775808, |
| "pio_latency": 30000, |
| "platform": "system.pc", |
| "PXCAPLinkCap": 0, |
| "CapabilityPtr": 0, |
| "MSIXCAPBaseOffset": 0, |
| "PXCAPDevCapabilities": 0, |
| "MSIXCAPCapId": 0, |
| "BAR3Size": 3, |
| "PXCAPCapabilities": 0, |
| "SubsystemID": 0, |
| "PXCAPCapId": 0, |
| "BAR4": 1, |
| "BAR1": 1012, |
| "BAR0": 496, |
| "BAR3": 884, |
| "BAR2": 368, |
| "BAR5": 1, |
| "PXCAPDevStatus": 0, |
| "disks": [ |
| { |
| "driveID": "master", |
| "name": "disks0", |
| "image": { |
| "read_only": false, |
| "name": "image", |
| "cxx_class": "CowDiskImage", |
| "eventq_index": 0, |
| "child": { |
| "read_only": true, |
| "name": "child", |
| "eventq_index": 0, |
| "cxx_class": "RawDiskImage", |
| "path": "system.pc.south_bridge.ide.disks0.image.child", |
| "image_file": "/work/gem5/dist/disks/linux-x86.img", |
| "type": "RawDiskImage" |
| }, |
| "path": "system.pc.south_bridge.ide.disks0.image", |
| "image_file": "", |
| "type": "CowDiskImage", |
| "table_size": 65536 |
| }, |
| "delay": 1000000, |
| "eventq_index": 0, |
| "cxx_class": "IdeDisk", |
| "path": "system.pc.south_bridge.ide.disks0", |
| "type": "IdeDisk" |
| }, |
| { |
| "driveID": "master", |
| "name": "disks1", |
| "image": { |
| "read_only": false, |
| "name": "image", |
| "cxx_class": "CowDiskImage", |
| "eventq_index": 0, |
| "child": { |
| "read_only": true, |
| "name": "child", |
| "eventq_index": 0, |
| "cxx_class": "RawDiskImage", |
| "path": "system.pc.south_bridge.ide.disks1.image.child", |
| "image_file": "/work/gem5/dist/disks/linux-bigswap2.img", |
| "type": "RawDiskImage" |
| }, |
| "path": "system.pc.south_bridge.ide.disks1.image", |
| "image_file": "", |
| "type": "CowDiskImage", |
| "table_size": 65536 |
| }, |
| "delay": 1000000, |
| "eventq_index": 0, |
| "cxx_class": "IdeDisk", |
| "path": "system.pc.south_bridge.ide.disks1", |
| "type": "IdeDisk" |
| } |
| ], |
| "BAR2Size": 8, |
| "MSICAPNextCapability": 0, |
| "ExpansionROM": 0, |
| "MSICAPMsgCtrl": 0, |
| "BAR5Size": 0, |
| "CardbusCIS": 0, |
| "MSIXPbaOffset": 0, |
| "MSICAPBaseOffset": 0, |
| "MaximumLatency": 0, |
| "BAR2LegacyIO": true, |
| "LatencyTimer": 0, |
| "BAR4LegacyIO": false, |
| "PXCAPLinkStatus": 0, |
| "PXCAPDevCap2": 0, |
| "PXCAPDevCtrl": 0, |
| "MSICAPMaskBits": 0, |
| "Command": 0, |
| "SubClassCode": 1, |
| "pci_func": 0, |
| "BAR5LegacyIO": false, |
| "MSICAPMsgData": 0, |
| "BIST": 0, |
| "PXCAPDevCtrl2": 0, |
| "pci_bus": 0, |
| "InterruptLine": 14, |
| "MSICAPMsgAddr": 0, |
| "BAR3LegacyIO": true, |
| "BAR4Size": 16, |
| "path": "system.pc.south_bridge.ide", |
| "MinimumGrant": 0, |
| "Status": 640, |
| "BAR0Size": 8, |
| "system": "system", |
| "name": "ide", |
| "PXCAPNextCapability": 0, |
| "eventq_index": 0, |
| "type": "IdeController", |
| "ctrl_offset": 0, |
| "PXCAPBaseOffset": 0, |
| "DeviceID": 28945, |
| "io_shift": 0, |
| "CacheLineSize": 0, |
| "dma": { |
| "peer": "system.iobus.slave[1]", |
| "role": "MASTER" |
| }, |
| "PMCAPCapId": 0, |
| "config_latency": 20000, |
| "BAR1Size": 3, |
| "pio": { |
| "peer": "system.iobus.master[3]", |
| "role": "SLAVE" |
| }, |
| "pci_dev": 4, |
| "PMCAPCtrlStatus": 0, |
| "cxx_class": "IdeController", |
| "clk_domain": "system.clk_domain", |
| "SubsystemVendorID": 0, |
| "PMCAPBaseOffset": 0, |
| "config": { |
| "peer": "system.iobus.master[4]", |
| "role": "SLAVE" |
| }, |
| "MSICAPPendingBits": 0, |
| "MSIXTableOffset": 0, |
| "MSICAPMsgUpperAddr": 0, |
| "MSICAPCapId": 0, |
| "BAR0LegacyIO": true, |
| "ProgIF": 128, |
| "BAR1LegacyIO": true, |
| "PMCAPCapabilities": 0, |
| "ClassCode": 1 |
| }, |
| "type": "SouthBridge", |
| "cmos": { |
| "name": "cmos", |
| "pio": { |
| "peer": "system.iobus.master[1]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "time": "Sun Jan 1 00:00:00 2012", |
| "int_pin": { |
| "eventq_index": 0, |
| "path": "system.pc.south_bridge.cmos.int_pin", |
| "type": "X86IntSourcePin", |
| "name": "int_pin", |
| "cxx_class": "X86ISA::IntSourcePin" |
| }, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Cmos", |
| "path": "system.pc.south_bridge.cmos", |
| "pio_addr": 9223372036854775920, |
| "type": "Cmos" |
| } |
| }, |
| "fake_floppy": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "fake_floppy", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[18]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 2, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.fake_floppy", |
| "pio_addr": 9223372036854776818, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "i_dont_exist2": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "i_dont_exist2", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[12]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 1, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.i_dont_exist2", |
| "pio_addr": 9223372036854776045, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "system": "system", |
| "i_dont_exist1": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "i_dont_exist1", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[11]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 1, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.i_dont_exist1", |
| "pio_addr": 9223372036854775936, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "intrctrl": "system.intrctrl", |
| "com_1": { |
| "name": "com_1", |
| "pio": { |
| "peer": "system.iobus.master[14]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "system": "system", |
| "terminal": { |
| "name": "terminal", |
| "output": true, |
| "number": 0, |
| "intr_control": "system.intrctrl", |
| "eventq_index": 0, |
| "cxx_class": "Terminal", |
| "path": "system.pc.com_1.terminal", |
| "type": "Terminal", |
| "port": 3456 |
| }, |
| "platform": "system.pc", |
| "eventq_index": 0, |
| "cxx_class": "Uart8250", |
| "path": "system.pc.com_1", |
| "pio_addr": 9223372036854776824, |
| "type": "Uart8250" |
| }, |
| "eventq_index": 0, |
| "cxx_class": "Pc", |
| "path": "system.pc", |
| "behind_pci": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "behind_pci", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[13]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 8, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.behind_pci", |
| "pio_addr": 9223372036854779128, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| }, |
| "type": "Pc", |
| "fake_com_3": { |
| "system": "system", |
| "ret_data8": 255, |
| "name": "fake_com_3", |
| "warn_access": "", |
| "pio": { |
| "peer": "system.iobus.master[16]", |
| "role": "SLAVE" |
| }, |
| "ret_bad_addr": false, |
| "pio_latency": 100000, |
| "clk_domain": "system.clk_domain", |
| "fake_mem": false, |
| "pio_size": 8, |
| "ret_data32": 4294967295, |
| "eventq_index": 0, |
| "update_data": false, |
| "ret_data64": 18446744073709551615, |
| "cxx_class": "IsaFake", |
| "path": "system.pc.fake_com_3", |
| "pio_addr": 9223372036854776808, |
| "type": "IsaFake", |
| "ret_data16": 65535 |
| } |
| }, |
| "eventq_index": 0, |
| "e820_table": { |
| "name": "e820_table", |
| "cxx_class": "X86ISA::E820Table", |
| "eventq_index": 0, |
| "entries": [ |
| { |
| "addr": 0, |
| "range_type": 1, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::E820Entry", |
| "path": "system.e820_table.entries0", |
| "size": 654336, |
| "type": "X86E820Entry", |
| "name": "entries0" |
| }, |
| { |
| "addr": 654336, |
| "range_type": 2, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::E820Entry", |
| "path": "system.e820_table.entries1", |
| "size": 394240, |
| "type": "X86E820Entry", |
| "name": "entries1" |
| }, |
| { |
| "addr": 1048576, |
| "range_type": 1, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::E820Entry", |
| "path": "system.e820_table.entries2", |
| "size": 133169152, |
| "type": "X86E820Entry", |
| "name": "entries2" |
| }, |
| { |
| "addr": 134217728, |
| "range_type": 2, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::E820Entry", |
| "path": "system.e820_table.entries3", |
| "size": 3087007744, |
| "type": "X86E820Entry", |
| "name": "entries3" |
| }, |
| { |
| "addr": 4294901760, |
| "range_type": 2, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::E820Entry", |
| "path": "system.e820_table.entries4", |
| "size": 65536, |
| "type": "X86E820Entry", |
| "name": "entries4" |
| } |
| ], |
| "path": "system.e820_table", |
| "type": "X86E820Table" |
| }, |
| "smbios_table": { |
| "name": "smbios_table", |
| "structures": [ |
| { |
| "major": 0, |
| "vendor": "", |
| "name": "structures", |
| "characteristics": [], |
| "release_date": "06/08/2008", |
| "cxx_class": "X86ISA::SMBios::BiosInformation", |
| "emb_cont_firmware_major": 0, |
| "rom_size": 0, |
| "starting_addr_segment": 0, |
| "emb_cont_firmware_minor": 0, |
| "version": "", |
| "eventq_index": 0, |
| "characteristic_ext_bytes": [], |
| "path": "system.smbios_table.structures", |
| "type": "X86SMBiosBiosInformation", |
| "minor": 0 |
| } |
| ], |
| "major_version": 2, |
| "minor_version": 5, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::SMBios::SMBiosTable", |
| "path": "system.smbios_table", |
| "type": "X86SMBiosSMBiosTable" |
| }, |
| "dvfs_handler": { |
| "enable": false, |
| "name": "dvfs_handler", |
| "sys_clk_domain": "system.clk_domain", |
| "transition_latency": 100000000, |
| "eventq_index": 0, |
| "cxx_class": "DVFSHandler", |
| "domains": [], |
| "path": "system.dvfs_handler", |
| "type": "DVFSHandler" |
| }, |
| "work_end_exit_count": 0, |
| "type": "LinuxX86System", |
| "voltage_domain": { |
| "name": "voltage_domain", |
| "eventq_index": 0, |
| "voltage": [ |
| "1.0" |
| ], |
| "cxx_class": "VoltageDomain", |
| "path": "system.voltage_domain", |
| "type": "VoltageDomain" |
| }, |
| "cache_line_size": 64, |
| "boot_osflags": "earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1", |
| "physmem": [ |
| { |
| "static_frontend_latency": 10000, |
| "tRFC": 260000, |
| "activation_limit": 4, |
| "in_addr_map": true, |
| "IDD3N2": "0.0", |
| "tWTR": 7500, |
| "IDD52": "0.0", |
| "clk_domain": "system.clk_domain", |
| "channels": 1, |
| "write_buffer_size": 64, |
| "device_bus_width": 8, |
| "VDD": "1.5", |
| "write_high_thresh_perc": 85, |
| "cxx_class": "DRAMCtrl", |
| "bank_groups_per_rank": 0, |
| "IDD2N2": "0.0", |
| "port": { |
| "peer": "system.membus.master[3]", |
| "role": "SLAVE" |
| }, |
| "tCCD_L": 0, |
| "IDD2N": "0.05", |
| "null": false, |
| "IDD2P1": "0.0", |
| "eventq_index": 0, |
| "tRRD": 6000, |
| "tRTW": 2500, |
| "IDD4R": "0.187", |
| "burst_length": 8, |
| "tRTP": 7500, |
| "IDD4W": "0.165", |
| "tWR": 15000, |
| "banks_per_rank": 8, |
| "devices_per_rank": 8, |
| "IDD2P02": "0.0", |
| "IDD6": "0.0", |
| "IDD5": "0.22", |
| "tRCD": 13750, |
| "type": "DRAMCtrl", |
| "IDD3P02": "0.0", |
| "IDD0": "0.075", |
| "IDD62": "0.0", |
| "min_writes_per_switch": 16, |
| "mem_sched_policy": "frfcfs", |
| "IDD02": "0.0", |
| "IDD2P0": "0.0", |
| "ranks_per_channel": 2, |
| "page_policy": "open_adaptive", |
| "IDD4W2": "0.0", |
| "tCS": 2500, |
| "tCL": 13750, |
| "read_buffer_size": 32, |
| "conf_table_reported": true, |
| "tCK": 1250, |
| "tRAS": 35000, |
| "tRP": 13750, |
| "tBURST": 5000, |
| "path": "system.physmem", |
| "tXP": 0, |
| "tXS": 0, |
| "addr_mapping": "RoRaBaCoCh", |
| "IDD3P0": "0.0", |
| "IDD3P1": "0.0", |
| "IDD3N": "0.057", |
| "name": "physmem", |
| "tXSDLL": 0, |
| "device_size": 536870912, |
| "dll": true, |
| "tXAW": 30000, |
| "write_low_thresh_perc": 50, |
| "range": "0:134217727", |
| "VDD2": "0.0", |
| "IDD2P12": "0.0", |
| "tRRD_L": 0, |
| "tXPDLL": 0, |
| "IDD4R2": "0.0", |
| "device_rowbuffer_size": 1024, |
| "static_backend_latency": 10000, |
| "max_accesses_per_row": 16, |
| "IDD3P12": "0.0", |
| "tREFI": 7800000 |
| } |
| ], |
| "work_cpus_ckpt_count": 0, |
| "work_begin_exit_count": 0, |
| "path": "system", |
| "cpu_clk_domain": { |
| "name": "cpu_clk_domain", |
| "clock": [ |
| 500 |
| ], |
| "init_perf_level": 0, |
| "voltage_domain": "system.voltage_domain", |
| "eventq_index": 0, |
| "cxx_class": "SrcClockDomain", |
| "path": "system.cpu_clk_domain", |
| "type": "SrcClockDomain", |
| "domain_id": -1 |
| }, |
| "toL2Bus": { |
| "slave": { |
| "peer": [ |
| "system.cpu0.icache.mem_side", |
| "system.cpu0.dcache.mem_side", |
| "system.cpu0.itb.walker.port", |
| "system.cpu0.dtb.walker.port" |
| ], |
| "role": "SLAVE" |
| }, |
| "name": "toL2Bus", |
| "snoop_filter": null, |
| "forward_latency": 0, |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "width": 32, |
| "eventq_index": 0, |
| "master": { |
| "peer": [ |
| "system.l2c.cpu_side" |
| ], |
| "role": "MASTER" |
| }, |
| "response_latency": 1, |
| "cxx_class": "CoherentXBar", |
| "path": "system.toL2Bus", |
| "snoop_response_latency": 1, |
| "type": "CoherentXBar", |
| "use_default_range": false, |
| "frontend_latency": 1 |
| }, |
| "work_end_ckpt_count": 0, |
| "mem_mode": "atomic", |
| "name": "system", |
| "init_param": 0, |
| "system_port": { |
| "peer": "system.membus.slave[1]", |
| "role": "MASTER" |
| }, |
| "load_addr_mask": 18446744073709551615, |
| "cpu": [ |
| { |
| "do_statistics_insts": true, |
| "numThreads": 1, |
| "itb": { |
| "name": "itb", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::TLB", |
| "walker": { |
| "name": "walker", |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Walker", |
| "path": "system.cpu0.itb.walker", |
| "type": "X86PagetableWalker", |
| "port": { |
| "peer": "system.toL2Bus.slave[2]", |
| "role": "MASTER" |
| }, |
| "num_squash_per_cycle": 4 |
| }, |
| "path": "system.cpu0.itb", |
| "type": "X86TLB", |
| "size": 64 |
| }, |
| "simulate_data_stalls": false, |
| "function_trace": false, |
| "do_checkpoint_insts": true, |
| "cxx_class": "AtomicSimpleCPU", |
| "max_loads_all_threads": 0, |
| "system": "system", |
| "apic_clk_domain": { |
| "name": "apic_clk_domain", |
| "clk_domain": "system.cpu_clk_domain", |
| "eventq_index": 0, |
| "cxx_class": "DerivedClockDomain", |
| "path": "system.cpu0.apic_clk_domain", |
| "type": "DerivedClockDomain", |
| "clk_divider": 16 |
| }, |
| "clk_domain": "system.cpu_clk_domain", |
| "function_trace_start": 0, |
| "cpu_id": 0, |
| "width": 1, |
| "checker": null, |
| "eventq_index": 0, |
| "do_quiesce": true, |
| "type": "AtomicSimpleCPU", |
| "fastmem": false, |
| "profile": 0, |
| "icache_port": { |
| "peer": "system.cpu0.icache.cpu_side", |
| "role": "MASTER" |
| }, |
| "icache": { |
| "cpu_side": { |
| "peer": "system.cpu0.icache_port", |
| "role": "SLAVE" |
| }, |
| "prefetcher": null, |
| "clk_domain": "system.cpu_clk_domain", |
| "write_buffers": 8, |
| "response_latency": 2, |
| "cxx_class": "BaseCache", |
| "size": 32768, |
| "tags": { |
| "name": "tags", |
| "eventq_index": 0, |
| "hit_latency": 2, |
| "clk_domain": "system.cpu_clk_domain", |
| "sequential_access": false, |
| "assoc": 1, |
| "cxx_class": "LRU", |
| "path": "system.cpu0.icache.tags", |
| "block_size": 64, |
| "type": "LRU", |
| "size": 32768 |
| }, |
| "system": "system", |
| "max_miss_count": 0, |
| "eventq_index": 0, |
| "mem_side": { |
| "peer": "system.toL2Bus.slave[0]", |
| "role": "MASTER" |
| }, |
| "mshrs": 4, |
| "forward_snoops": true, |
| "hit_latency": 2, |
| "demand_mshr_reserve": 1, |
| "tgts_per_mshr": 20, |
| "addr_ranges": [ |
| "0:18446744073709551615" |
| ], |
| "is_read_only": true, |
| "prefetch_on_access": false, |
| "path": "system.cpu0.icache", |
| "name": "icache", |
| "type": "BaseCache", |
| "sequential_access": false, |
| "assoc": 1 |
| }, |
| "interrupts": { |
| "int_master": { |
| "peer": "system.membus.slave[3]", |
| "role": "MASTER" |
| }, |
| "name": "interrupts", |
| "pio": { |
| "peer": "system.membus.master[1]", |
| "role": "SLAVE" |
| }, |
| "int_slave": { |
| "peer": "system.membus.master[2]", |
| "role": "SLAVE" |
| }, |
| "pio_latency": 100000, |
| "clk_domain": "system.cpu0.apic_clk_domain", |
| "system": "system", |
| "int_latency": 1000, |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Interrupts", |
| "path": "system.cpu0.interrupts", |
| "pio_addr": 2305843009213693952, |
| "type": "X86LocalApic" |
| }, |
| "dcache_port": { |
| "peer": "system.cpu0.dcache.cpu_side", |
| "role": "MASTER" |
| }, |
| "socket_id": 0, |
| "max_insts_all_threads": 0, |
| "path": "system.cpu0", |
| "max_loads_any_thread": 0, |
| "switched_out": false, |
| "workload": [], |
| "name": "cpu0", |
| "dtb": { |
| "name": "dtb", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::TLB", |
| "walker": { |
| "name": "walker", |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Walker", |
| "path": "system.cpu0.dtb.walker", |
| "type": "X86PagetableWalker", |
| "port": { |
| "peer": "system.toL2Bus.slave[3]", |
| "role": "MASTER" |
| }, |
| "num_squash_per_cycle": 4 |
| }, |
| "path": "system.cpu0.dtb", |
| "type": "X86TLB", |
| "size": 64 |
| }, |
| "simpoint_start_insts": [], |
| "max_insts_any_thread": 0, |
| "simulate_inst_stalls": false, |
| "progress_interval": 0, |
| "branchPred": null, |
| "dcache": { |
| "cpu_side": { |
| "peer": "system.cpu0.dcache_port", |
| "role": "SLAVE" |
| }, |
| "prefetcher": null, |
| "clk_domain": "system.cpu_clk_domain", |
| "write_buffers": 8, |
| "response_latency": 2, |
| "cxx_class": "BaseCache", |
| "size": 32768, |
| "tags": { |
| "name": "tags", |
| "eventq_index": 0, |
| "hit_latency": 2, |
| "clk_domain": "system.cpu_clk_domain", |
| "sequential_access": false, |
| "assoc": 4, |
| "cxx_class": "LRU", |
| "path": "system.cpu0.dcache.tags", |
| "block_size": 64, |
| "type": "LRU", |
| "size": 32768 |
| }, |
| "system": "system", |
| "max_miss_count": 0, |
| "eventq_index": 0, |
| "mem_side": { |
| "peer": "system.toL2Bus.slave[1]", |
| "role": "MASTER" |
| }, |
| "mshrs": 4, |
| "forward_snoops": true, |
| "hit_latency": 2, |
| "demand_mshr_reserve": 1, |
| "tgts_per_mshr": 20, |
| "addr_ranges": [ |
| "0:18446744073709551615" |
| ], |
| "is_read_only": false, |
| "prefetch_on_access": false, |
| "path": "system.cpu0.dcache", |
| "name": "dcache", |
| "type": "BaseCache", |
| "sequential_access": false, |
| "assoc": 4 |
| }, |
| "isa": [ |
| { |
| "eventq_index": 0, |
| "path": "system.cpu0.isa", |
| "type": "X86ISA", |
| "name": "isa", |
| "cxx_class": "X86ISA::ISA" |
| } |
| ], |
| "tracer": { |
| "eventq_index": 0, |
| "path": "system.cpu0.tracer", |
| "type": "ExeTracer", |
| "name": "tracer", |
| "cxx_class": "Trace::ExeTracer" |
| } |
| }, |
| { |
| "do_statistics_insts": true, |
| "numThreads": 1, |
| "itb": { |
| "name": "itb", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::TLB", |
| "walker": { |
| "name": "walker", |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Walker", |
| "path": "system.cpu1.itb.walker", |
| "type": "X86PagetableWalker", |
| "num_squash_per_cycle": 4 |
| }, |
| "path": "system.cpu1.itb", |
| "type": "X86TLB", |
| "size": 64 |
| }, |
| "system": "system", |
| "function_trace": false, |
| "do_checkpoint_insts": true, |
| "cxx_class": "TimingSimpleCPU", |
| "max_loads_all_threads": 0, |
| "clk_domain": "system.cpu_clk_domain", |
| "function_trace_start": 0, |
| "cpu_id": 0, |
| "checker": null, |
| "eventq_index": 0, |
| "do_quiesce": true, |
| "type": "TimingSimpleCPU", |
| "profile": 0, |
| "interrupts": null, |
| "socket_id": 0, |
| "max_insts_all_threads": 0, |
| "path": "system.cpu1", |
| "max_loads_any_thread": 0, |
| "switched_out": true, |
| "workload": [], |
| "name": "cpu1", |
| "dtb": { |
| "name": "dtb", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::TLB", |
| "walker": { |
| "name": "walker", |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Walker", |
| "path": "system.cpu1.dtb.walker", |
| "type": "X86PagetableWalker", |
| "num_squash_per_cycle": 4 |
| }, |
| "path": "system.cpu1.dtb", |
| "type": "X86TLB", |
| "size": 64 |
| }, |
| "simpoint_start_insts": [], |
| "max_insts_any_thread": 0, |
| "progress_interval": 0, |
| "branchPred": null, |
| "isa": [ |
| { |
| "eventq_index": 0, |
| "path": "system.cpu1.isa", |
| "type": "X86ISA", |
| "name": "isa", |
| "cxx_class": "X86ISA::ISA" |
| } |
| ], |
| "tracer": { |
| "eventq_index": 0, |
| "path": "system.cpu1.tracer", |
| "type": "ExeTracer", |
| "name": "tracer", |
| "cxx_class": "Trace::ExeTracer" |
| } |
| }, |
| { |
| "SQEntries": 32, |
| "smtLSQThreshold": 100, |
| "fetchTrapLatency": 1, |
| "iewToRenameDelay": 1, |
| "itb": { |
| "name": "itb", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::TLB", |
| "walker": { |
| "name": "walker", |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Walker", |
| "path": "system.cpu2.itb.walker", |
| "type": "X86PagetableWalker", |
| "num_squash_per_cycle": 4 |
| }, |
| "path": "system.cpu2.itb", |
| "type": "X86TLB", |
| "size": 64 |
| }, |
| "fetchWidth": 8, |
| "max_loads_all_threads": 0, |
| "cpu_id": 0, |
| "fetchToDecodeDelay": 1, |
| "renameToDecodeDelay": 1, |
| "do_quiesce": true, |
| "renameToROBDelay": 1, |
| "max_insts_all_threads": 0, |
| "decodeWidth": 8, |
| "commitToFetchDelay": 1, |
| "needsTSO": true, |
| "smtIQThreshold": 100, |
| "workload": [], |
| "name": "cpu2", |
| "SSITSize": 1024, |
| "activity": 0, |
| "max_loads_any_thread": 0, |
| "tracer": { |
| "eventq_index": 0, |
| "path": "system.cpu2.tracer", |
| "type": "ExeTracer", |
| "name": "tracer", |
| "cxx_class": "Trace::ExeTracer" |
| }, |
| "decodeToFetchDelay": 1, |
| "renameWidth": 8, |
| "numThreads": 1, |
| "squashWidth": 8, |
| "function_trace": false, |
| "backComSize": 5, |
| "decodeToRenameDelay": 1, |
| "store_set_clear_period": 250000, |
| "numPhysIntRegs": 256, |
| "fuPool": { |
| "name": "fuPool", |
| "FUList": [ |
| { |
| "count": 6, |
| "opList": [ |
| { |
| "opClass": "IntAlu", |
| "opLat": 1, |
| "name": "opList", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList0.opList", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList0", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList0", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 2, |
| "opList": [ |
| { |
| "opClass": "IntMult", |
| "opLat": 3, |
| "name": "opList0", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList1.opList0", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "IntDiv", |
| "opLat": 1, |
| "name": "opList1", |
| "pipelined": false, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList1.opList1", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList1", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList1", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 4, |
| "opList": [ |
| { |
| "opClass": "FloatAdd", |
| "opLat": 2, |
| "name": "opList0", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList2.opList0", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "FloatCmp", |
| "opLat": 2, |
| "name": "opList1", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList2.opList1", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "FloatCvt", |
| "opLat": 2, |
| "name": "opList2", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList2.opList2", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList2", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList2", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 2, |
| "opList": [ |
| { |
| "opClass": "FloatMult", |
| "opLat": 4, |
| "name": "opList0", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList3.opList0", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "FloatDiv", |
| "opLat": 12, |
| "name": "opList1", |
| "pipelined": false, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList3.opList1", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "FloatSqrt", |
| "opLat": 24, |
| "name": "opList2", |
| "pipelined": false, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList3.opList2", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList3", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList3", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 0, |
| "opList": [ |
| { |
| "opClass": "MemRead", |
| "opLat": 1, |
| "name": "opList", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList4.opList", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList4", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList4", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 4, |
| "opList": [ |
| { |
| "opClass": "SimdAdd", |
| "opLat": 1, |
| "name": "opList00", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList00", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdAddAcc", |
| "opLat": 1, |
| "name": "opList01", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList01", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdAlu", |
| "opLat": 1, |
| "name": "opList02", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList02", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdCmp", |
| "opLat": 1, |
| "name": "opList03", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList03", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdCvt", |
| "opLat": 1, |
| "name": "opList04", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList04", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdMisc", |
| "opLat": 1, |
| "name": "opList05", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList05", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdMult", |
| "opLat": 1, |
| "name": "opList06", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList06", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdMultAcc", |
| "opLat": 1, |
| "name": "opList07", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList07", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdShift", |
| "opLat": 1, |
| "name": "opList08", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList08", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdShiftAcc", |
| "opLat": 1, |
| "name": "opList09", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList09", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdSqrt", |
| "opLat": 1, |
| "name": "opList10", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList10", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatAdd", |
| "opLat": 1, |
| "name": "opList11", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList11", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatAlu", |
| "opLat": 1, |
| "name": "opList12", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList12", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatCmp", |
| "opLat": 1, |
| "name": "opList13", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList13", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatCvt", |
| "opLat": 1, |
| "name": "opList14", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList14", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatDiv", |
| "opLat": 1, |
| "name": "opList15", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList15", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatMisc", |
| "opLat": 1, |
| "name": "opList16", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList16", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatMult", |
| "opLat": 1, |
| "name": "opList17", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList17", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatMultAcc", |
| "opLat": 1, |
| "name": "opList18", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList18", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "SimdFloatSqrt", |
| "opLat": 1, |
| "name": "opList19", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList5.opList19", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList5", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList5", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 0, |
| "opList": [ |
| { |
| "opClass": "MemWrite", |
| "opLat": 1, |
| "name": "opList", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList6.opList", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList6", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList6", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 4, |
| "opList": [ |
| { |
| "opClass": "MemRead", |
| "opLat": 1, |
| "name": "opList0", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList7.opList0", |
| "type": "OpDesc" |
| }, |
| { |
| "opClass": "MemWrite", |
| "opLat": 1, |
| "name": "opList1", |
| "pipelined": true, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList7.opList1", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList7", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList7", |
| "type": "FUDesc" |
| }, |
| { |
| "count": 1, |
| "opList": [ |
| { |
| "opClass": "IprAccess", |
| "opLat": 3, |
| "name": "opList", |
| "pipelined": false, |
| "eventq_index": 0, |
| "cxx_class": "OpDesc", |
| "path": "system.cpu2.fuPool.FUList8.opList", |
| "type": "OpDesc" |
| } |
| ], |
| "name": "FUList8", |
| "eventq_index": 0, |
| "cxx_class": "FUDesc", |
| "path": "system.cpu2.fuPool.FUList8", |
| "type": "FUDesc" |
| } |
| ], |
| "eventq_index": 0, |
| "cxx_class": "FUPool", |
| "path": "system.cpu2.fuPool", |
| "type": "FUPool" |
| }, |
| "socket_id": 0, |
| "renameToFetchDelay": 1, |
| "path": "system.cpu2", |
| "numRobs": 1, |
| "switched_out": true, |
| "smtLSQPolicy": "Partitioned", |
| "fetchBufferSize": 64, |
| "simpoint_start_insts": [], |
| "max_insts_any_thread": 0, |
| "smtROBThreshold": 100, |
| "numIQEntries": 64, |
| "branchPred": { |
| "choiceCtrBits": 2, |
| "name": "branchPred", |
| "globalCtrBits": 2, |
| "numThreads": 1, |
| "localHistoryTableSize": 2048, |
| "choicePredictorSize": 8192, |
| "instShiftAmt": 2, |
| "localCtrBits": 2, |
| "eventq_index": 0, |
| "BTBTagSize": 16, |
| "BTBEntries": 4096, |
| "cxx_class": "TournamentBP", |
| "path": "system.cpu2.branchPred", |
| "localPredictorSize": 2048, |
| "type": "TournamentBP", |
| "RASSize": 16, |
| "globalPredictorSize": 8192 |
| }, |
| "LFSTSize": 1024, |
| "isa": [ |
| { |
| "eventq_index": 0, |
| "path": "system.cpu2.isa", |
| "type": "X86ISA", |
| "name": "isa", |
| "cxx_class": "X86ISA::ISA" |
| } |
| ], |
| "smtROBPolicy": "Partitioned", |
| "iewToFetchDelay": 1, |
| "do_statistics_insts": true, |
| "dispatchWidth": 8, |
| "commitToDecodeDelay": 1, |
| "smtIQPolicy": "Partitioned", |
| "issueWidth": 8, |
| "LSQCheckLoads": true, |
| "commitToRenameDelay": 1, |
| "cachePorts": 200, |
| "system": "system", |
| "checker": null, |
| "numPhysFloatRegs": 256, |
| "eventq_index": 0, |
| "type": "DerivO3CPU", |
| "wbWidth": 8, |
| "interrupts": null, |
| "smtCommitPolicy": "RoundRobin", |
| "issueToExecuteDelay": 1, |
| "dtb": { |
| "name": "dtb", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::TLB", |
| "walker": { |
| "name": "walker", |
| "clk_domain": "system.cpu_clk_domain", |
| "system": "system", |
| "eventq_index": 0, |
| "cxx_class": "X86ISA::Walker", |
| "path": "system.cpu2.dtb.walker", |
| "type": "X86PagetableWalker", |
| "num_squash_per_cycle": 4 |
| }, |
| "path": "system.cpu2.dtb", |
| "type": "X86TLB", |
| "size": 64 |
| }, |
| "numROBEntries": 192, |
| "fetchQueueSize": 32, |
| "iewToCommitDelay": 1, |
| "smtNumFetchingThreads": 1, |
| "forwardComSize": 5, |
| "do_checkpoint_insts": true, |
| "cxx_class": "DerivO3CPU", |
| "commitToIEWDelay": 1, |
| "commitWidth": 8, |
| "clk_domain": "system.cpu_clk_domain", |
| "function_trace_start": 0, |
| "smtFetchPolicy": "SingleThread", |
| "profile": 0, |
| "LSQDepCheckShift": 4, |
| "trapLatency": 13, |
| "iewToDecodeDelay": 1, |
| "numPhysCCRegs": 1280, |
| "renameToIEWDelay": 2, |
| "progress_interval": 0, |
| "LQEntries": 32 |
| } |
| ], |
| "intrctrl": { |
| "name": "intrctrl", |
| "sys": "system", |
| "eventq_index": 0, |
| "cxx_class": "IntrControl", |
| "path": "system.intrctrl", |
| "type": "IntrControl" |
| }, |
| "work_begin_ckpt_count": 0, |
| "work_begin_cpu_id_exit": -1, |
| "work_item_id": -1, |
| "num_work_ids": 16 |
| }, |
| "time_sync_period": 100000000000, |
| "eventq_index": 0, |
| "time_sync_spin_threshold": 100000000, |
| "cxx_class": "Root", |
| "path": "root", |
| "time_sync_enable": false, |
| "type": "Root", |
| "full_system": true |
| } |