dev: Introduced new LupV Platform
This is a platform with a RISC-V processor and the LupIO devices that
will allow users to decide which programmable interrupt controller to
use in their system. It currently uses the PLIC device.
Change-Id: Ife6cf5c14845be725e66178693e9ba0ee5fda511
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53027
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
diff --git a/src/dev/riscv/LupV.py b/src/dev/riscv/LupV.py
new file mode 100644
index 0000000..d14595e
--- /dev/null
+++ b/src/dev/riscv/LupV.py
@@ -0,0 +1,35 @@
+# Copyright (c) 2021 The Regents of the University of California
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from m5.objects.Platform import Platform
+from m5.params import Param
+
+class LupV(Platform):
+ type = 'LupV'
+ cxx_header = "dev/riscv/lupv.hh"
+ cxx_class = 'gem5::LupV'
+ pic = Param.Plic("PIC")
+ uart_int_id = Param.Int("Interrupt ID to be used if the PLIC is used here")
diff --git a/src/dev/riscv/SConscript b/src/dev/riscv/SConscript
index 23f1074..5124b55 100755
--- a/src/dev/riscv/SConscript
+++ b/src/dev/riscv/SConscript
@@ -29,6 +29,7 @@
Import('*')
SimObject('HiFive.py', tags='riscv isa')
+SimObject('LupV.py', tags='riscv isa')
SimObject('Clint.py', tags='riscv isa')
SimObject('PlicDevice.py', tags='riscv isa')
SimObject('Plic.py', tags='riscv isa')
@@ -40,6 +41,7 @@
DebugFlag('VirtIOMMIO', tags='riscv isa')
Source('hifive.cc', tags='riscv isa')
+Source('lupv.cc', tags='riscv isa')
Source('clint.cc', tags='riscv isa')
Source('plic_device.cc', tags='riscv isa')
Source('plic.cc', tags='riscv isa')
diff --git a/src/dev/riscv/lupv.cc b/src/dev/riscv/lupv.cc
new file mode 100644
index 0000000..7658b2a
--- /dev/null
+++ b/src/dev/riscv/lupv.cc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2021 The Regents of the University of California
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "dev/riscv/lupv.hh"
+
+#include "dev/riscv/plic.hh"
+#include "params/LupV.hh"
+
+namespace gem5
+{
+
+using namespace RiscvISA;
+
+LupV::LupV(const Params ¶ms) :
+ Platform(params),
+ pic(params.pic),
+ uartIntID(params.uart_int_id)
+{
+}
+
+void
+LupV::postConsoleInt()
+{
+ pic->post(uartIntID);
+}
+
+void
+LupV::clearConsoleInt()
+{
+ pic->clear(uartIntID);
+}
+
+void
+LupV::postPciInt(int line)
+{
+ pic->post(line);
+}
+
+void
+LupV::clearPciInt(int line)
+{
+ pic->clear(line);
+}
+
+Addr
+LupV::pciToDma(Addr pciAddr) const
+{
+ panic("LupV::pciToDma() has not been implemented.");
+}
+
+void
+LupV::serialize(CheckpointOut &cp) const
+{
+}
+
+void
+LupV::unserialize(CheckpointIn &cp)
+{
+}
+
+} // namespace gem5
diff --git a/src/dev/riscv/lupv.hh b/src/dev/riscv/lupv.hh
new file mode 100644
index 0000000..0f5fc96
--- /dev/null
+++ b/src/dev/riscv/lupv.hh
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2021 The Regents of the University of California
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DEV_RISCV_LUPV_HH__
+#define __DEV_RISCV_LUPV_HH__
+
+#include "dev/platform.hh"
+#include "dev/riscv/plic.hh"
+#include "params/LupV.hh"
+
+namespace gem5
+{
+
+using namespace RiscvISA;
+
+/**
+ * The LupV collection consists of a RISC-V processor, as well as the set of
+ * LupiIO devices. This LupV platform allows for us to not only use these
+ * devices, bu alsoseamlessly decide which interrupt controller we want to use.
+ * For example, this platform has been tested to use both the LupioPIC for
+ * interrupts, as well as the PLIC.
+ **/
+
+class LupV : public Platform
+{
+ public:
+ Plic *pic;
+ int uartIntID;
+
+ public:
+
+ PARAMS(LupV);
+ LupV(const Params ¶ms);
+
+ void postConsoleInt() override;
+
+ void clearConsoleInt() override;
+
+ void postPciInt(int line) override;
+
+ void clearPciInt(int line) override;
+
+ virtual Addr pciToDma(Addr pciAddr) const;
+
+ void serialize(CheckpointOut &cp) const override;
+
+ void unserialize(CheckpointIn &cp) override;
+};
+
+} // namespace gem5
+
+#endif // __DEV_RISCV_LUPV_HH__
