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gem5 / public / gem5 / refs/heads/feature-gui / . / src / arch / gcn3 / gpu_decoder.hh
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/*
* Copyright (c) 2015-2017 Advanced Micro Devices, Inc.
* All rights reserved.
*
* For use for simulation and test purposes only
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Authors: John Slice
* Anthony Gutierrez
*/
#ifndef __ARCH_GCN3_DECODER_HH__
#define __ARCH_GCN3_DECODER_HH__
#include <string>
#include <vector>
#include "arch/gcn3/gpu_types.hh"
class GPUStaticInst;
namespace Gcn3ISA
{
class Decoder;
union InstFormat;
using IsaDecodeMethod = GPUStaticInst*(Decoder::*)(MachInst);
class Decoder
{
public:
Decoder();
~Decoder();
GPUStaticInst* decode(MachInst mach_inst);
private:
static IsaDecodeMethod tableDecodePrimary[512];
static IsaDecodeMethod tableSubDecode_OPU_VOP3[768];
static IsaDecodeMethod tableSubDecode_OP_DS[256];
static IsaDecodeMethod tableSubDecode_OP_FLAT[128];
static IsaDecodeMethod tableSubDecode_OP_MIMG[128];
static IsaDecodeMethod tableSubDecode_OP_MTBUF[16];
static IsaDecodeMethod tableSubDecode_OP_MUBUF[128];
static IsaDecodeMethod tableSubDecode_OP_SMEM[64];
static IsaDecodeMethod tableSubDecode_OP_SOP1[256];
static IsaDecodeMethod tableSubDecode_OP_SOPC[128];
static IsaDecodeMethod tableSubDecode_OP_SOPP[128];
static IsaDecodeMethod tableSubDecode_OP_VINTRP[4];
static IsaDecodeMethod tableSubDecode_OP_VOP1[256];
static IsaDecodeMethod tableSubDecode_OP_VOPC[256];
GPUStaticInst* decode_OPU_VOP3__V_ADDC_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ADD_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ADD_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ADD_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ADD_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ADD_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ALIGNBIT_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ALIGNBYTE_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_AND_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ASHRREV_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ASHRREV_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_ASHRREV_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_BCNT_U32_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_BFE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_BFE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_BFI_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_BFM_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_BFREV_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CEIL_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CEIL_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CEIL_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CLREXCP(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_CLASS_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_CLASS_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_CLASS_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_EQ_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_F_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GE_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_GT_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LE_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LG_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LG_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LG_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_LT_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NEQ_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NEQ_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NEQ_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NE_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NE_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NE_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NE_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NGE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NGE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NGE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NGT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NGT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NGT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLG_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLG_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLG_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_NLT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_O_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_O_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_O_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_TRU_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_TRU_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_TRU_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_T_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_T_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_T_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_T_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_T_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_T_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_U_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_U_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMPX_U_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_CLASS_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_CLASS_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_CLASS_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_EQ_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_F_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GE_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_GT_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LE_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LG_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LG_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LG_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_LT_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NEQ_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NEQ_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NEQ_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NE_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NE_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NE_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NE_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NE_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NE_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NGE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NGE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NGE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NGT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NGT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NGT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLG_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLG_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLG_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_NLT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_O_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_O_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_O_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_TRU_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_TRU_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_TRU_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_T_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_T_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_T_I64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_T_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_T_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_T_U64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_U_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_U_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CMP_U_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CNDMASK_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_COS_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_COS_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CUBEID_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CUBEMA_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CUBESC_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CUBETC_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F16_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F16_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F16_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_UBYTE0(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_UBYTE1(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_UBYTE2(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F32_UBYTE3(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F64_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F64_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_F64_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_FLR_I32_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_I16_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_I32_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_I32_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_OFF_F32_I4(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PKNORM_I16_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PKNORM_U16_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PKRTZ_F16_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PK_I16_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PK_U16_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_PK_U8_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_RPI_I32_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_U16_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_U32_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_CVT_U32_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_FIXUP_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_FIXUP_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_FIXUP_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_FMAS_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_FMAS_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_SCALE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_DIV_SCALE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_EXP_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_EXP_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_EXP_LEGACY_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FFBH_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FFBH_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FFBL_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FLOOR_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FLOOR_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FLOOR_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FMA_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FMA_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FMA_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FRACT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FRACT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FRACT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FREXP_EXP_I16_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FREXP_EXP_I32_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FREXP_EXP_I32_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FREXP_MANT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FREXP_MANT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_FREXP_MANT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_INTERP_MOV_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_INTERP_P1LL_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_INTERP_P1LV_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_INTERP_P1_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_INTERP_P2_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_INTERP_P2_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LDEXP_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LDEXP_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LDEXP_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LERP_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LOG_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LOG_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LOG_LEGACY_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LSHLREV_B16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LSHLREV_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LSHLREV_B64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LSHRREV_B16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LSHRREV_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_LSHRREV_B64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAC_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAC_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_I32_I24(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_I64_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_LEGACY_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_U32_U24(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAD_U64_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX3_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX3_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX3_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MAX_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MBCNT_HI_U32_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MBCNT_LO_U32_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MED3_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MED3_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MED3_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN3_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN3_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN3_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_I16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MIN_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MOV_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MOV_FED_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MQSAD_PK_U16_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MQSAD_U32_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MSAD_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_HI_I32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_HI_I32_I24(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_HI_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_HI_U32_U24(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_I32_I24(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_LEGACY_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_LO_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_LO_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_MUL_U32_U24(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_NOP(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_NOT_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_OR_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_PERM_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_QSAD_PK_U16_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RCP_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RCP_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RCP_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RCP_IFLAG_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_READLANE_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RNDNE_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RNDNE_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RNDNE_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RSQ_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RSQ_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_RSQ_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SAD_HI_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SAD_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SAD_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SAD_U8(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SIN_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SIN_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SQRT_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SQRT_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SQRT_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUBBREV_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUBB_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUBREV_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUBREV_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUBREV_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUBREV_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUB_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUB_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUB_U16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_SUB_U32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_TRIG_PREOP_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_TRUNC_F16(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_TRUNC_F32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_TRUNC_F64(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_WRITELANE_B32(MachInst);
GPUStaticInst* decode_OPU_VOP3__V_XOR_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_RTN_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_SRC2_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_ADD_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_AND_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_AND_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_AND_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_AND_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_AND_SRC2_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_AND_SRC2_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_APPEND(MachInst);
GPUStaticInst* decode_OP_DS__DS_BPERMUTE_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_RTN_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_CMPST_RTN_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_CONDXCHG32_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_CONSUME(MachInst);
GPUStaticInst* decode_OP_DS__DS_DEC_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_DEC_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_DEC_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_DEC_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_DEC_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_DEC_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_GWS_BARRIER(MachInst);
GPUStaticInst* decode_OP_DS__DS_GWS_INIT(MachInst);
GPUStaticInst* decode_OP_DS__DS_GWS_SEMA_BR(MachInst);
GPUStaticInst* decode_OP_DS__DS_GWS_SEMA_P(MachInst);
GPUStaticInst* decode_OP_DS__DS_GWS_SEMA_RELEASE_ALL(MachInst);
GPUStaticInst* decode_OP_DS__DS_GWS_SEMA_V(MachInst);
GPUStaticInst* decode_OP_DS__DS_INC_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_INC_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_INC_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_INC_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_INC_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_INC_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_I32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_I64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_RTN_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_RTN_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_RTN_I32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_RTN_I64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_SRC2_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_SRC2_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_SRC2_I32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_SRC2_I64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MAX_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_I32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_I64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_RTN_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_RTN_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_RTN_I32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_RTN_I64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_SRC2_F32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_SRC2_F64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_SRC2_I32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_SRC2_I64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MIN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MSKOR_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MSKOR_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_MSKOR_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_MSKOR_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_NOP(MachInst);
GPUStaticInst* decode_OP_DS__DS_ORDERED_COUNT(MachInst);
GPUStaticInst* decode_OP_DS__DS_OR_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_OR_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_OR_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_OR_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_OR_SRC2_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_OR_SRC2_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_PERMUTE_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ2ST64_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ2ST64_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ2_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ2_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_B128(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_B96(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_I16(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_I8(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_U16(MachInst);
GPUStaticInst* decode_OP_DS__DS_READ_U8(MachInst);
GPUStaticInst* decode_OP_DS__DS_RSUB_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_RSUB_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_RSUB_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_RSUB_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_RSUB_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_RSUB_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_SUB_RTN_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_SUB_RTN_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_SUB_SRC2_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_SUB_SRC2_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_SUB_U32(MachInst);
GPUStaticInst* decode_OP_DS__DS_SUB_U64(MachInst);
GPUStaticInst* decode_OP_DS__DS_SWIZZLE_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRAP_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE2ST64_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE2ST64_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE2_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE2_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_B128(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_B16(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_B8(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_B96(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_SRC2_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRITE_SRC2_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRXCHG2ST64_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRXCHG2ST64_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRXCHG2_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRXCHG2_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRXCHG_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_WRXCHG_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_XOR_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_XOR_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_XOR_RTN_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_XOR_RTN_B64(MachInst);
GPUStaticInst* decode_OP_DS__DS_XOR_SRC2_B32(MachInst);
GPUStaticInst* decode_OP_DS__DS_XOR_SRC2_B64(MachInst);
GPUStaticInst* decode_OP_EXP(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_ADD(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_ADD_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_AND(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_AND_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_CMPSWAP(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_CMPSWAP_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_DEC(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_DEC_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_INC(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_INC_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_OR(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_OR_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SMAX(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SMAX_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SMIN(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SMIN_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SUB(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SUB_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SWAP(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_SWAP_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_UMAX(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_UMAX_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_UMIN(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_UMIN_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_XOR(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_ATOMIC_XOR_X2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_DWORD(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_DWORDX2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_DWORDX3(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_DWORDX4(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_SBYTE(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_SSHORT(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_UBYTE(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_LOAD_USHORT(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_STORE_BYTE(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_STORE_DWORD(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_STORE_DWORDX2(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_STORE_DWORDX3(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_STORE_DWORDX4(MachInst);
GPUStaticInst* decode_OP_FLAT__FLAT_STORE_SHORT(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_ADD(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_AND(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_CMPSWAP(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_DEC(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_INC(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_OR(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_SMAX(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_SMIN(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_SUB(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_SWAP(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_UMAX(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_UMIN(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_ATOMIC_XOR(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_B(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_B_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_B_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_B_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_B(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_B_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_B_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_B_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_L(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_LZ(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_LZ_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_L_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_C_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_L(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_LZ(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_LZ_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_L_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GATHER4_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GET_LOD(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_GET_RESINFO(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_LOAD(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_LOAD_MIP(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_LOAD_MIP_PCK(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_LOAD_MIP_PCK_SGN(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_LOAD_PCK(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_LOAD_PCK_SGN(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_B(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_B_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_B_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_B_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_CD(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_CD_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_CD_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_CD_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_B(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_B_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_B_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_B_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_CD(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_CD_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_CD_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_CD_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_D(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_D_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_D_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_D_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_L(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_LZ(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_LZ_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_L_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_C_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_D(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_D_CL(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_D_CL_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_D_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_L(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_LZ(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_LZ_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_L_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_SAMPLE_O(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_STORE(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_STORE_MIP(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_STORE_MIP_PCK(MachInst);
GPUStaticInst* decode_OP_MIMG__IMAGE_STORE_PCK(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_X(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XY(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XYZ(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XYZW(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_X(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XY(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XYZ(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XYZW(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_X(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XY(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XYZ(MachInst);
GPUStaticInst*
decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XYZW(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_X(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XY(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XYZ(MachInst);
GPUStaticInst* decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XYZW(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_ADD(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_ADD_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_AND(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_AND_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_CMPSWAP(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_DEC(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_DEC_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_INC(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_INC_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_OR(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_OR_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SMAX(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SMAX_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SMIN(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SMIN_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SUB(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SUB_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SWAP(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_SWAP_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_UMAX(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_UMAX_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_UMIN(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_UMIN_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_XOR(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_ATOMIC_XOR_X2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_DWORD(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_DWORDX2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_DWORDX3(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_DWORDX4(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_X(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XY(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZ(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZW(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_X(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XY(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XYZ(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XYZW(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_SBYTE(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_SSHORT(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_UBYTE(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_LOAD_USHORT(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_BYTE(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORD(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORDX2(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORDX3(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_DWORDX4(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_X(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XY(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XYZ(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XYZW(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_X(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_XY(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_XYZ(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_FORMAT_XYZW(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_LDS_DWORD(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_STORE_SHORT(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_WBINVL1(MachInst);
GPUStaticInst* decode_OP_MUBUF__BUFFER_WBINVL1_VOL(MachInst);
GPUStaticInst* decode_OP_SMEM__S_ATC_PROBE(MachInst);
GPUStaticInst* decode_OP_SMEM__S_ATC_PROBE_BUFFER(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORD(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORDX16(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORDX2(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORDX4(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_LOAD_DWORDX8(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_STORE_DWORD(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_STORE_DWORDX2(MachInst);
GPUStaticInst* decode_OP_SMEM__S_BUFFER_STORE_DWORDX4(MachInst);
GPUStaticInst* decode_OP_SMEM__S_DCACHE_INV(MachInst);
GPUStaticInst* decode_OP_SMEM__S_DCACHE_INV_VOL(MachInst);
GPUStaticInst* decode_OP_SMEM__S_DCACHE_WB(MachInst);
GPUStaticInst* decode_OP_SMEM__S_DCACHE_WB_VOL(MachInst);
GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORD(MachInst);
GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX16(MachInst);
GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX2(MachInst);
GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX4(MachInst);
GPUStaticInst* decode_OP_SMEM__S_LOAD_DWORDX8(MachInst);
GPUStaticInst* decode_OP_SMEM__S_MEMREALTIME(MachInst);
GPUStaticInst* decode_OP_SMEM__S_MEMTIME(MachInst);
GPUStaticInst* decode_OP_SMEM__S_STORE_DWORD(MachInst);
GPUStaticInst* decode_OP_SMEM__S_STORE_DWORDX2(MachInst);
GPUStaticInst* decode_OP_SMEM__S_STORE_DWORDX4(MachInst);
GPUStaticInst* decode_OP_SOP1__S_ABS_I32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_ANDN2_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_AND_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BCNT0_I32_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BCNT0_I32_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BCNT1_I32_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BCNT1_I32_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BITSET0_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BITSET0_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BITSET1_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BITSET1_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BREV_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_BREV_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_CBRANCH_JOIN(MachInst);
GPUStaticInst* decode_OP_SOP1__S_CMOV_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_CMOV_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FF0_I32_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FF0_I32_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FF1_I32_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FF1_I32_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FLBIT_I32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FLBIT_I32_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FLBIT_I32_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_FLBIT_I32_I64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_GETPC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOVRELD_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOVRELD_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOVRELS_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOVRELS_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOV_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOV_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_MOV_FED_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_NAND_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_NOR_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_NOT_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_NOT_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_ORN2_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_OR_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_QUADMASK_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_QUADMASK_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_RFE_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_SETPC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_SET_GPR_IDX_IDX(MachInst);
GPUStaticInst* decode_OP_SOP1__S_SEXT_I32_I16(MachInst);
GPUStaticInst* decode_OP_SOP1__S_SEXT_I32_I8(MachInst);
GPUStaticInst* decode_OP_SOP1__S_SWAPPC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_WQM_B32(MachInst);
GPUStaticInst* decode_OP_SOP1__S_WQM_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_XNOR_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP1__S_XOR_SAVEEXEC_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ABSDIFF_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ADDC_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ADD_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ADD_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ANDN2_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ANDN2_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_AND_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_AND_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ASHR_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ASHR_I64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_BFE_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_BFE_I64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_BFE_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_BFE_U64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_BFM_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_BFM_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_CBRANCH_G_FORK(MachInst);
GPUStaticInst* decode_OP_SOP2__S_CSELECT_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_CSELECT_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_LSHL_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_LSHL_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_LSHR_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_LSHR_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_MAX_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_MAX_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_MIN_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_MIN_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_MUL_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_NAND_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_NAND_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_NOR_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_NOR_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ORN2_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_ORN2_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_OR_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_OR_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_RFE_RESTORE_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_SUBB_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_SUB_I32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_SUB_U32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_XNOR_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_XNOR_B64(MachInst);
GPUStaticInst* decode_OP_SOP2__S_XOR_B32(MachInst);
GPUStaticInst* decode_OP_SOP2__S_XOR_B64(MachInst);
GPUStaticInst* decode_OP_SOPC__S_BITCMP0_B32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_BITCMP0_B64(MachInst);
GPUStaticInst* decode_OP_SOPC__S_BITCMP1_B32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_BITCMP1_B64(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_EQ_I32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_EQ_U32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_EQ_U64(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_GE_I32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_GE_U32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_GT_I32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_GT_U32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LE_I32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LE_U32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LG_I32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LG_U32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LG_U64(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LT_I32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_CMP_LT_U32(MachInst);
GPUStaticInst* decode_OP_SOPC__S_SETVSKIP(MachInst);
GPUStaticInst* decode_OP_SOPC__S_SET_GPR_IDX_ON(MachInst);
GPUStaticInst* decode_OP_SOPK__S_ADDK_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CBRANCH_I_FORK(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMOVK_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_EQ_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_EQ_U32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_GE_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_GE_U32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_GT_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_GT_U32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_LE_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_LE_U32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_LG_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_LG_U32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_LT_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_CMPK_LT_U32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_GETREG_B32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_MOVK_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_MULK_I32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_SETREG_B32(MachInst);
GPUStaticInst* decode_OP_SOPK__S_SETREG_IMM32_B32(MachInst);
GPUStaticInst* decode_OP_SOPP__S_BARRIER(MachInst);
GPUStaticInst* decode_OP_SOPP__S_BRANCH(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_CDBGSYS(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_CDBGSYS_AND_USER(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_CDBGSYS_OR_USER(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_CDBGUSER(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_EXECNZ(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_EXECZ(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_SCC0(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_SCC1(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_VCCNZ(MachInst);
GPUStaticInst* decode_OP_SOPP__S_CBRANCH_VCCZ(MachInst);
GPUStaticInst* decode_OP_SOPP__S_DECPERFLEVEL(MachInst);
GPUStaticInst* decode_OP_SOPP__S_ENDPGM(MachInst);
GPUStaticInst* decode_OP_SOPP__S_ENDPGM_SAVED(MachInst);
GPUStaticInst* decode_OP_SOPP__S_ICACHE_INV(MachInst);
GPUStaticInst* decode_OP_SOPP__S_INCPERFLEVEL(MachInst);
GPUStaticInst* decode_OP_SOPP__S_NOP(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SENDMSG(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SENDMSGHALT(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SETHALT(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SETKILL(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SETPRIO(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SET_GPR_IDX_MODE(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SET_GPR_IDX_OFF(MachInst);
GPUStaticInst* decode_OP_SOPP__S_SLEEP(MachInst);
GPUStaticInst* decode_OP_SOPP__S_TRAP(MachInst);
GPUStaticInst* decode_OP_SOPP__S_TTRACEDATA(MachInst);
GPUStaticInst* decode_OP_SOPP__S_WAITCNT(MachInst);
GPUStaticInst* decode_OP_SOPP__S_WAKEUP(MachInst);
GPUStaticInst* decode_OP_VINTRP__V_INTERP_MOV_F32(MachInst);
GPUStaticInst* decode_OP_VINTRP__V_INTERP_P1_F32(MachInst);
GPUStaticInst* decode_OP_VINTRP__V_INTERP_P2_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_BFREV_B32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CEIL_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CEIL_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CEIL_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CLREXCP(MachInst);
GPUStaticInst* decode_OP_VOP1__V_COS_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_COS_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F16_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F16_I16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F16_U16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_I32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_U32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_UBYTE0(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_UBYTE1(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_UBYTE2(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F32_UBYTE3(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F64_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F64_I32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_F64_U32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_FLR_I32_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_I16_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_I32_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_I32_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_OFF_F32_I4(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_RPI_I32_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_U16_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_U32_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_CVT_U32_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_EXP_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_EXP_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_EXP_LEGACY_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FFBH_I32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FFBH_U32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FFBL_B32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FLOOR_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FLOOR_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FLOOR_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FRACT_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FRACT_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FRACT_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FREXP_EXP_I16_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FREXP_EXP_I32_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FREXP_EXP_I32_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FREXP_MANT_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FREXP_MANT_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_FREXP_MANT_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_LOG_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_LOG_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_LOG_LEGACY_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_MOV_B32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_MOV_FED_B32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_NOP(MachInst);
GPUStaticInst* decode_OP_VOP1__V_NOT_B32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RCP_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RCP_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RCP_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RCP_IFLAG_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_READFIRSTLANE_B32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RNDNE_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RNDNE_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RNDNE_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RSQ_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RSQ_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_RSQ_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_SIN_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_SIN_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_SQRT_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_SQRT_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_SQRT_F64(MachInst);
GPUStaticInst* decode_OP_VOP1__V_TRUNC_F16(MachInst);
GPUStaticInst* decode_OP_VOP1__V_TRUNC_F32(MachInst);
GPUStaticInst* decode_OP_VOP1__V_TRUNC_F64(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ADDC_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ADD_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ADD_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ADD_U16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ADD_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_AND_B32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ASHRREV_I16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_ASHRREV_I32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_CNDMASK_B32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_LDEXP_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_LSHLREV_B16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_LSHLREV_B32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_LSHRREV_B16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_LSHRREV_B32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAC_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAC_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MADAK_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MADAK_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MADMK_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MADMK_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAX_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAX_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAX_I16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAX_I32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAX_U16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MAX_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MIN_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MIN_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MIN_I16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MIN_I32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MIN_U16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MIN_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_HI_I32_I24(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_HI_U32_U24(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_I32_I24(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_LEGACY_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_LO_U16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_MUL_U32_U24(MachInst);
GPUStaticInst* decode_OP_VOP2__V_OR_B32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUBBREV_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUBB_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUBREV_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUBREV_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUBREV_U16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUBREV_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUB_F16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUB_F32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUB_U16(MachInst);
GPUStaticInst* decode_OP_VOP2__V_SUB_U32(MachInst);
GPUStaticInst* decode_OP_VOP2__V_XOR_B32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_CLASS_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_CLASS_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_CLASS_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_EQ_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_F_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GE_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_GT_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LE_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LG_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LG_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LG_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_LT_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NEQ_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NEQ_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NEQ_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NE_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NGE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NGE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NGE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NGT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NGT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NGT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLG_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLG_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLG_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_NLT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_O_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_O_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_O_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_TRU_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_TRU_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_TRU_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_T_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_T_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_T_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_T_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_T_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_T_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_U_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_U_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMPX_U_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_CLASS_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_EQ_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_F_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GE_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_GT_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LE_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LG_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LG_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LG_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_LT_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NEQ_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NEQ_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NEQ_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NE_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NE_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NE_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NE_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NE_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NE_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NGE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NGE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NGE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NGT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NGT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NGT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLE_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLE_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLE_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLG_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLG_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLG_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLT_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLT_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_NLT_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_O_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_O_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_O_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_TRU_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_TRU_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_TRU_F64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_T_I16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_T_I32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_T_I64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_T_U16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_T_U32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_T_U64(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_U_F16(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_U_F32(MachInst);
GPUStaticInst* decode_OP_VOPC__V_CMP_U_F64(MachInst);
GPUStaticInst* subDecode_OPU_VOP3(MachInst);
GPUStaticInst* subDecode_OP_DS(MachInst);
GPUStaticInst* subDecode_OP_FLAT(MachInst);
GPUStaticInst* subDecode_OP_MIMG(MachInst);
GPUStaticInst* subDecode_OP_MTBUF(MachInst);
GPUStaticInst* subDecode_OP_MUBUF(MachInst);
GPUStaticInst* subDecode_OP_SMEM(MachInst);
GPUStaticInst* subDecode_OP_SOP1(MachInst);
GPUStaticInst* subDecode_OP_SOPC(MachInst);
GPUStaticInst* subDecode_OP_SOPP(MachInst);
GPUStaticInst* subDecode_OP_VINTRP(MachInst);
GPUStaticInst* subDecode_OP_VOP1(MachInst);
GPUStaticInst* subDecode_OP_VOPC(MachInst);
GPUStaticInst* decode_invalid(MachInst);
};
struct InFmt_DS {
unsigned int OFFSET0 : 8;
unsigned int OFFSET1 : 8;
unsigned int GDS : 1;
unsigned int OP : 8;
unsigned int pad_25 : 1;
unsigned int ENCODING : 6;
};
struct InFmt_DS_1 {
unsigned int ADDR : 8;
unsigned int DATA0 : 8;
unsigned int DATA1 : 8;
unsigned int VDST : 8;
};
struct InFmt_EXP {
unsigned int EN : 4;
unsigned int TGT : 6;
unsigned int COMPR : 1;
unsigned int DONE : 1;
unsigned int VM : 1;
unsigned int pad_13_25 : 13;
unsigned int ENCODING : 6;
};
struct InFmt_EXP_1 {
unsigned int VSRC0 : 8;
unsigned int VSRC1 : 8;
unsigned int VSRC2 : 8;
unsigned int VSRC3 : 8;
};
struct InFmt_FLAT {
unsigned int pad_0_15 : 16;
unsigned int GLC : 1;
unsigned int SLC : 1;
unsigned int OP : 7;
unsigned int pad_25 : 1;
unsigned int ENCODING : 6;
};
struct InFmt_FLAT_1 {
unsigned int ADDR : 8;
unsigned int DATA : 8;
unsigned int pad_16_22 : 7;
unsigned int TFE : 1;
unsigned int VDST : 8;
};
struct InFmt_INST {
unsigned int ENCODING : 32;
};
struct InFmt_MIMG {
unsigned int pad_0_7 : 8;
unsigned int DMASK : 4;
unsigned int UNORM : 1;
unsigned int GLC : 1;
unsigned int DA : 1;
unsigned int R128 : 1;
unsigned int TFE : 1;
unsigned int LWE : 1;
unsigned int OP : 7;
unsigned int SLC : 1;
unsigned int ENCODING : 6;
};
struct InFmt_MIMG_1 {
unsigned int VADDR : 8;
unsigned int VDATA : 8;
unsigned int SRSRC : 5;
unsigned int SSAMP : 5;
unsigned int pad_26_30 : 5;
unsigned int D16 : 1;
};
struct InFmt_MTBUF {
unsigned int OFFSET : 12;
unsigned int OFFEN : 1;
unsigned int IDXEN : 1;
unsigned int GLC : 1;
unsigned int OP : 4;
unsigned int DFMT : 4;
unsigned int NFMT : 3;
unsigned int ENCODING : 6;
};
struct InFmt_MTBUF_1 {
unsigned int VADDR : 8;
unsigned int VDATA : 8;
unsigned int SRSRC : 5;
unsigned int pad_21 : 1;
unsigned int SLC : 1;
unsigned int TFE : 1;
unsigned int SOFFSET : 8;
};
struct InFmt_MUBUF {
unsigned int OFFSET : 12;
unsigned int OFFEN : 1;
unsigned int IDXEN : 1;
unsigned int GLC : 1;
unsigned int pad_15 : 1;
unsigned int LDS : 1;
unsigned int SLC : 1;
unsigned int OP : 7;
unsigned int pad_25 : 1;
unsigned int ENCODING : 6;
};
struct InFmt_MUBUF_1 {
unsigned int VADDR : 8;
unsigned int VDATA : 8;
unsigned int SRSRC : 5;
unsigned int pad_21_22 : 2;
unsigned int TFE : 1;
unsigned int SOFFSET : 8;
};
struct InFmt_SMEM {
unsigned int SBASE : 6;
unsigned int SDATA : 7;
unsigned int pad_13_15 : 3;
unsigned int GLC : 1;
unsigned int IMM : 1;
unsigned int OP : 8;
unsigned int ENCODING : 6;
};
struct InFmt_SMEM_1 {
unsigned int OFFSET : 20;
};
struct InFmt_SOP1 {
unsigned int SSRC0 : 8;
unsigned int OP : 8;
unsigned int SDST : 7;
unsigned int ENCODING : 9;
};
struct InFmt_SOP2 {
unsigned int SSRC0 : 8;
unsigned int SSRC1 : 8;
unsigned int SDST : 7;
unsigned int OP : 7;
unsigned int ENCODING : 2;
};
struct InFmt_SOPC {
unsigned int SSRC0 : 8;
unsigned int SSRC1 : 8;
unsigned int OP : 7;
unsigned int ENCODING : 9;
};
struct InFmt_SOPK {
unsigned int SIMM16 : 16;
unsigned int SDST : 7;
unsigned int OP : 5;
unsigned int ENCODING : 4;
};
struct InFmt_SOPP {
unsigned int SIMM16 : 16;
unsigned int OP : 7;
unsigned int ENCODING : 9;
};
struct InFmt_VINTRP {
unsigned int VSRC : 8;
unsigned int ATTRCHAN : 2;
unsigned int ATTR : 6;
unsigned int OP : 2;
unsigned int VDST : 8;
unsigned int ENCODING : 6;
};
struct InFmt_VOP1 {
unsigned int SRC0 : 9;
unsigned int OP : 8;
unsigned int VDST : 8;
unsigned int ENCODING : 7;
};
struct InFmt_VOP2 {
unsigned int SRC0 : 9;
unsigned int VSRC1 : 8;
unsigned int VDST : 8;
unsigned int OP : 6;
unsigned int ENCODING : 1;
};
struct InFmt_VOP3 {
unsigned int VDST : 8;
unsigned int ABS : 3;
unsigned int pad_11_14 : 4;
unsigned int CLAMP : 1;
unsigned int OP : 10;
unsigned int ENCODING : 6;
};
struct InFmt_VOP3_1 {
unsigned int SRC0 : 9;
unsigned int SRC1 : 9;
unsigned int SRC2 : 9;
unsigned int OMOD : 2;
unsigned int NEG : 3;
};
struct InFmt_VOP3_SDST_ENC {
unsigned int VDST : 8;
unsigned int SDST : 7;
unsigned int CLAMP : 1;
unsigned int OP : 10;
unsigned int ENCODING : 6;
};
struct InFmt_VOPC {
unsigned int SRC0 : 9;
unsigned int VSRC1 : 8;
unsigned int OP : 8;
unsigned int ENCODING : 7;
};
struct InFmt_VOP_DPP {
unsigned int SRC0 : 8;
unsigned int DPP_CTRL : 9;
unsigned int pad_17_18 : 2;
unsigned int BOUND_CTRL : 1;
unsigned int SRC0_NEG : 1;
unsigned int SRC0_ABS : 1;
unsigned int SRC1_NEG : 1;
unsigned int SRC1_ABS : 1;
unsigned int BANK_MASK : 4;
unsigned int ROW_MASK : 4;
};
struct InFmt_VOP_SDWA {
unsigned int SRC0 : 8;
unsigned int DST_SEL : 3;
unsigned int DST_UNUSED : 2;
unsigned int CLAMP : 1;
unsigned int pad_14_15 : 2;
unsigned int SRC0_SEL : 3;
unsigned int SRC0_SEXT : 1;
unsigned int SRC0_NEG : 1;
unsigned int SRC0_ABS : 1;
unsigned int pad_22_23 : 2;
unsigned int SRC1_SEL : 3;
unsigned int SRC1_SEXT : 1;
unsigned int SRC1_NEG : 1;
unsigned int SRC1_ABS : 1;
};
union InstFormat {
InFmt_DS iFmt_DS;
InFmt_DS_1 iFmt_DS_1;
InFmt_EXP iFmt_EXP;
InFmt_EXP_1 iFmt_EXP_1;
InFmt_FLAT iFmt_FLAT;
InFmt_FLAT_1 iFmt_FLAT_1;
InFmt_INST iFmt_INST;
InFmt_MIMG iFmt_MIMG;
InFmt_MIMG_1 iFmt_MIMG_1;
InFmt_MTBUF iFmt_MTBUF;
InFmt_MTBUF_1 iFmt_MTBUF_1;
InFmt_MUBUF iFmt_MUBUF;
InFmt_MUBUF_1 iFmt_MUBUF_1;
InFmt_SMEM iFmt_SMEM;
InFmt_SMEM_1 iFmt_SMEM_1;
InFmt_SOP1 iFmt_SOP1;
InFmt_SOP2 iFmt_SOP2;
InFmt_SOPC iFmt_SOPC;
InFmt_SOPK iFmt_SOPK;
InFmt_SOPP iFmt_SOPP;
InFmt_VINTRP iFmt_VINTRP;
InFmt_VOP1 iFmt_VOP1;
InFmt_VOP2 iFmt_VOP2;
InFmt_VOP3 iFmt_VOP3;
InFmt_VOP3_1 iFmt_VOP3_1;
InFmt_VOP3_SDST_ENC iFmt_VOP3_SDST_ENC;
InFmt_VOPC iFmt_VOPC;
InFmt_VOP_DPP iFmt_VOP_DPP;
InFmt_VOP_SDWA iFmt_VOP_SDWA;
uint32_t imm_u32;
float imm_f32;
}; // union InstFormat
} // namespace Gcn3ISA
#endif // __ARCH_GCN3_DECODER_HH__